; boot.asm
; bin version

;from NASM manual:
; The BITS directive specifies whether NASM should generate code designed to run on a processor operating in 16-bit mode, 32-bit mode or 64-bit mode.
; You do not need to specify BITS 32 merely in order to use 32-bit instructions in a 16-bit DOS program; if you do, the assembler will generate incorrect code because it will be writing code targeted at a 32-bit platform, to be run on a 16-bit one:
; When NASM is in BITS 16 mode, instructions which use 32-bit data are prefixed with an 0x66 byte, and those referring to 32-bit addresses have an 0x67 prefix. In BITS 32 mode, the reverse is true: 32-bit instructions require no prefixes, whereas instructions using 16-bit data need an 0x66 and those working on 16-bit addresses need an 0x67.
; When NASM is in BITS 64 mode, most instructions operate the same as they do for BITS 32 mode.
[BITS 16]

; from the Programmer’s Reference Manual
;The segment containing the currently executing sequence of instructions is known as the current code segment;
;it is specified by means of the CS register. The 80386 fetches all instructions from this code segment, using
;as an offset the contents of the instruction pointer. CS is changed implicitly as the result of intersegment
;control-transfer instructions (for example, CALL and JMP), interrupts, and exceptions.
;The instruction pointer register (EIP) contains the offset address, relative to the start of the current code
;segment, of the next sequential instruction to be executed. The instruction pointer is not directly visible
;to the programmer; it is controlled implicitly by control-transfer instructions, interrupts, and exceptions.
;As Figure 2-9 shows, the low-order 16 bits of EIP is named IP and can be used by the processor as a unit.
;This feature is useful when executing instructions designed for the 8086 and 80286 processors.
; from http://www.supernovah.com/Tutorials/BootSector2.php
;As stated earlier, we cannot be sure if the BIOS set us up with the starting address of 0x7C0:0x0 or 0x0:0x7C00.
;We will use the second segment offset pair to execute our boot sector so we know for sure how the CPU will access
;our code. To do this, our very first instruction will be a far jump that simply jumps to the next instruction.
;The trick is, if we specify a segment, even if it is 0x0, the jmp will be a far jump and the CS register will be
;loaded with the value 0x0 and the IP register will be loaded with the address of the next instruction to be
;executed.
;[BITS 16]
;[ORG 0x7C00]
;jmp 0x0:Start
;Start:
; This code will set the CS segment to 0x0, set the IP register to the the very next instruction which will be slightly past 0x7C00, ….

; universal-loop
;     {
;       start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // in “gia ba?o”, “ba?o” ~ maintain as in “ba?o thu?/to^`n” …
; try/if   ;// tin messages …. the try/if is the “gia” of “gia ba?o” …
;  maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i va` messageA va` messageB va` messageNEW va` tinLA`NH va`… ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // the message “stack” is loaded or push-pop with messages …; // push-and-pop-or-sent-and-receive (&messageNEW-hay-tinLA`NH); // tin and shakespeare’s version of “all roads lead to rome”: “doubt thou the stars are fire doubt truth to be a liar but never doubt I loved ‘muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well'”:  1/19/2014 Sunday Service … Gospel ~ Good News Tin La\nh …”Gia Ba?o”:  the “gia” attempts to reach an agreement with the “ba?o” …// salinger on internet news: push/pop/create stack/heap by an expansion assignment (“muo^n loa`i” <= “muo^n loa`i va` messageA va` messageB va` messageC va` ….”)
; ;catch/else  ;// unmaintainable tin/messages or kho’ tin hay kho^ng tin no messages … SBTN Uye^n Thi. commercial for MBR [master boot record] “kho’ tin nhu+ng co’ tha^.t …”
; ; go-to-jump-tro+?-ve^` start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”);
; go-to-jump-tro+?-ve^` start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”);
;     }

; irish-catholic Pat Benatar song “heartbreaker, dreammaker, don’t you mess around with me …” ….
; perhaps “there’s beggary in a love that can be reckoned” when love is unconditional–gia ba?o chu’ hoa`ng to^n an hoa`ng phi hu`ng and 10 commandments–but
; the ten commandments say there’s a love that’s conditional … and the 10 commandments describe the limits or conditions of that love …
; from http://wiki.osdev.org/Babystep2:
;some say that the bootloader is loaded at [metaphorical address] 0000:7C00, while others say 07C0:0000.
;This is in fact the same [real] address: 16 * 0x0000 + 0x7C00 = 16 * 0x07C0 + 0x0000 = 0x7C00.

%define ORIGIN ;  ….. comment this out to use “org 0”

%ifdef ORIGIN
[ORG 0x7c00]
; segment:offset … ds:offset or cs:offset … 0:offset-from-0x7COO … that is, labels in code following is addressed as 0:0x7C00+offset-from-start-of-file

;Following code will set the CS segment to 0x0, set the IP register to the the very next instruction which will be slightly past 0x7C00, ….
jmp 0x0:start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction
; jmp start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction

%else ;
[ORG 0]
; segment:offset … ds:offset or cs:offset …  0x07C0:offset-from-0 … that is, labels in the code following is addressed as 0x07C0:0+offset-from-start-of-file

;Following code will set the CS segment to 0x07C0, set the IP register to the the very next instruction which will be slightly past 0x0, ….
jmp 0x07C0:start ; set up the ip stack pointer and cs segment register implicitly via jmp instruction
; jmp start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction

%endif ; ORIGIN

%ifdef ORIGIN
%define MEMORYSEGMENTREALLOWBOUND 0x7C00
%else
%define MEMORYSEGMENTREALLOWBOUND 0x0000
%endif ; ORIGIN
%define SEGMENTSIZE   512
%define MEMORYSEGMENTREALUPPERBOUND MEMORYSEGMENTREALLOWBOUND + SEGMENTSIZE

; data segment
;section datasegment align=16 ; start= follows=
;segment datasegment align=16 ; start= follows=
; align 16
datasegment   dw      123

;%define TRYIVT 0 ; try out ivt codes … comment this out to exclude ivt codes
%ifdef TRYIVT
; interrupt vector table
ivt:        times 1024 db 0 ; interrupt vector table: reserve space to push-pop BIOS’ ivt table
ivtend:
;the ivtr structure:
ivtr    DW 0 ; For limit storage
DD 0 ; For base storage

; interrup descriptor table
;idt:
;idt_end:
;the idtr structure:
;idtr   DW 0 ; For limit storage
; DD 0 ; For base storage
%endif ; TRYIVT

; stack segment
; section stacksegment align=16 ; start= follows=
; segment stacksegment align=16 ; start= follows=
; align 16
stacksegment  resb 64
stacktop:

; set up the data, stack, etc. segment registers
start:
;mov AX, 0x0
;mov    AX,seg DATASEGMENT1
mov AX, datasegment
mov     DS,AX
;mov    AX,seg STACKSEGMENT
mov AX, stacksegment
mov     SS,AX
mov     SP,stacktop

;%define TRYIVT 1 ; non-zero
%ifdef TRYIVT

;interrrupts are a type of (messageA + messageB + messageC + messageD + tinLa`nh + …):
; from http://wiki.osdev.org/Interrupt_Vector_Table
; The IVT is typically located at 0000:0000H, and is 400H bytes in size (4 bytes for each interrupt). Although the default address can be changed using the LIDT instruction on newer CPUs, this is usually not done because it is both inconvenient and incompatible with other implementations and/or older software (e.g. MS-DOS programs). However, note that the code must remain in the first MiB of RAM.
; format of the ivt table entries [1024/4=256 entries] is
; +———–+———–+
; |  Segment  |  Offset   |
; +———–+———–+
; 4           2           0
; from https://www.uop.edu.jo/issa/Assembly/programming.pdf
;ivt table is 1k in real mode, 2k in protected mode
;ivt entry is 4 bytes in real mode, 8 bytes in protected mode
;size of the pointer to ivt table is 4 bytes for addresses from 00000000 to 000003FF, is 8 bytes in protected mode

;%define BIVTSTART 0x0; Start of BIOS ivt data area
;struc   tBIOSIVT                      ; its structure
;        .SEGMENT      RESW    1
;        .OFFSET       RESW    1
;endstruc

; the ivt table defined in the data segment “datasegment” above
;;.ivt:        times 1024 db 0 ; interrupt vector table: reserve space to push-pop BIOS’ ivt table
;;.ivtend:
;changeivt:
; ;mov CX,0x0400 ;// = 1024
; mov CX, 256 ; setup loop counter
;.loadivtwithbiosivt: mov byte [ivt + cx*4] [0000:cx*4]
; loop .loadivtwithbiosivt
; mov byte [ivt + 0] [0000:0000] ; since “loop” exists when CX is 0, 0th entry must be done manually
; jmp .exit
;.loadbiosivtwithivt: mov byte [0000:cx*4] [ivt + cx*4]
; loop .loadbiosivtwithivt
; mov byte [0000:0000] [ivt + 0] ; since “loop” exists when CX is 0, 0th entry must be done manually
; jmp .exit

; from http://wiki.osdev.org/GDT_Tutorial
;gdtr   DW 0 ; For limit storage
; DD 0 ; For base storage
;GDT:
;GDT_end:
;setGdt:
;   xor EAX, EAX ; zero EAX register for use as scratch
;   mov AX, DS  ; the data segment “datasegment”
;   shl EAX, 4  ; The linear address should here be computed as segment * 16 + offset. shift left 4 ~ multiply by 16
;   add EAX, ”GDT” ; add offset to GDT structure in segment “datasegment”
;   mov [gdtr + 2], eax ; initialize gdtr’s base storage to segment:offset address of GDT structure
;   mov EAX, ”GDT_end”
;   sub EAX, ”GDT” ; size of GDT structure = GDT end – GDT begin
;   mov [gdtr], AX ; initialize gdtr’s to size of GDT structure = GDT end – GDT begin
;   lgdt [gdtr]  ; set the gdt with lgdt
;   ret

; the idt or ivt table defined in the data segment “datasegment” above
;;.ivt:        times 1024 db 0 ; interrupt vector table: reserve space to push-pop BIOS’ ivt table
;;.ivtend:
;;ivtend:
;; interrup descriptor table
;idt:
;idt_end:
;the idtr or ivtr structures defined in the data segment “datasegment” above:
;idtr   DW 0 ; For limit storage
; DD 0 ; For base storage
;ivtr   DW 0 ; For limit storage
; DD 0 ; For base storage
;.setidt:  ; set the interrupt descriptor table IDT
.setivt:   ; set the interrupt vector table IVT
xor EAX, EAX ; zero EAX register for use as scratch
mov AX, DS  ; the data segment “datasegment”
shl EAX, 4  ; The linear address should here be computed as segment * 16 + offset. shift left 4 ~ multiply by 16
;  add EAX, idt ; add offset to IDT structure in segment “datasegment”
add EAX, ivt ; add offset to IVT structure in segment “datasegment”
;  mov [idtr + 2], eax ; initialize gdtr’s base storage to segment:offset address of IDT structure
mov [ivtr + 2], eax ; initialize gdtr’s base storage to segment:offset address of IVT structur
;  mov EAX, idt_end
mov EAX, ivt_end
;  sub EAX, idt ; size of GDT structure = IDT end – IDT begin
sub EAX, ivt ; size of GDT structure = IVT end – IVT begin
;  mov [idtr], AX ; initialize gdtr’s to size of IDT structure = IDT end – IDT begin
mov [ivtr], AX ; initialize gdtr’s to size of IVT structure = IVT end – IVT begin
;  lgdt [idtr]  ; set the idt with lgdt
lgdt [ivtr]  ; set the ivt with lgdt
;.exit:
ret
%endif ; TRYIVT

; to use the stack, use “call” and “ret” instead of “jmp”
; effectively, the illegal “mov eip, label” ~ legal “jmp label”
; or just let the program flows, without the jmp, to instructions that follow
; jmp main ; jmp Loads EIP with the specified address
call main ; call = push + jmp; ret = pop + jmp
; from http://wiki.osdev.org/Babystep2:
; In real mode, addresses are calculated as segment * 16 + offset. Since offset can be much larger than 16, there are many pairs
; of segment and offset that point to the same address.
%define REALADDRESS(SEGMENTNO,OFFSETNO) SEGMENTNO*16+OFFSETNO

%define VERIFYSEGMENTADDRESSBOUND(SEGMENTADDRESSTOVERIFY, OFFSETADDRESSTOVERIFY) \
(REALADDRESS(SEGMENTADDRESSTOVERIFY,OFFSETADDRESSTOVERIFY) > MEMORYSEGMENTREALLOWBOUND) \
& (REALADDRESS(SEGMENTADDRESSTOVERIFY,OFFSETADDRESSTOVERIFY) < MEMORYSEGMENTREALUPPERBOUND)
; generate some virtual segment:offset address for use with a real address …
; TO DO: align the generated addresses to “natural” byte boundaries …
; %define GENERATESEGMENTADDRESS(REALADDRESSNO, &GENSEGMENTNO, &GENOFFSETNO) …………….
; %define GENERATEVIRTUALSEGMENTADDRESS(REALADDRESSNO, VIRTUALOFFSETADDRESSINPUT) (REALADDRESSNO – VIRTUALOFFSETADDRESSINPUT)/16
; %define GENERATEOFFSETNO(REALADDRESSNO, VIRTUALSEGMENTADDRESSINPUT) (REALADDRESSNO – VIRTUALSEGMENTADDRESSINPUT * 16)

; from http://geezer.osdevbrasil.net/johnfine/segments.htm:
;The way it really works
; Each segment register is really four registers: •A selector register
;•A base register
;•A limit register
;•An attribute register
;
;In all modes, every access to memory that uses a segment register uses the base, limit, and attribute portions of the segment register and does not use the selector portion.
;Every direct access to a segment register (PUSHing it on the stack, MOVing it to a general register etc.) uses only the selector portion. The base, limit, and attribute portions are either very hard or impossible to read (depending on CPU type). They are often called the “hidden” part of the segment register because they are so hard to read.
;Intel documentation refers to the hidden part of the segment register as a “descriptor cache”. This name obscures the actual behavior of the “hidden” part.
; In real mode (or V86 mode), when you write any 16-bit value to a segment register, the value you write goes into the selector and 16 times that value goes into the base. The limit and attribute are not changed.
;In pmode, any write to a segment register causes a descriptor to be fetched from the GDT or LDT and unpacked into the base, limit and attribute portion of the segment register. (Special exception for the NULL Selector).
;When the CPU switchs between real mode and pmode, the segment registers do not automatically change. The selectors still contain the exact bit pattern that was loaded into them in the previous mode. The hidden parts still contain the values they contained before, so the segment registers can still be used to access whatever segments they refered to before the switch.

;Writes to a segment register
;When I refer to “writing to a segment register”, I mean any action that puts a 16-bit value into a segment register.
;The obvious example is something like:
;  MOV  DS,AX
;However the same rules apply to many other situations, including: •POP to a segment register.
;•FAR JMP or CALL puts a value in CS.
;•IRET or FAR RET puts a value in CS.
;•Both hardware and software interrupts put a value in CS.
;•A ring transition puts a value in both SS and CS.
;•A task switch loads all the segment registers from a TSS.

; from the Programmer’s Reference Manual
;The segment containing the currently executing sequence of instructions is known as the current code segment;
;it is specified by means of the CS register. The 80386 fetches all instructions from this code segment, using
;as an offset the contents of the instruction pointer. CS is changed implicitly as the result of intersegment
;control-transfer instructions (for example, CALL and JMP), interrupts, and exceptions.

main:
; to use the stack, use “call” and “ret” instead of “jmp”
; jmp screensetup ; or just let the program flows, without the jmp, to instructions that follow

call screensetup
call clearscreenpixels
call sayhello
;call exit
call hang
ret ; return

; from http://www.supernovah.com/Tutorials/BootSector4.php:
;Video Memory
;As previously stated, what is printed to the screen is simply controlled by a special section of memory called
;the video memory (or VGA memory). This section of memory is then periodically copied to the video device
;memory which is then presented to the screen by the Digital Analog Converter (DAC). Currently we are in text
;mode 03h which is a form of EGA. The video memory for text mode 3h begins at 0xB8000. Text mode 03h is 80 characters wide
;and 25 characters tall. This gives us 2000 total characters (80 * 25). Each character consists of 2 bytes which
;yields 4000 bytes of memory in total. So this means that text mode 03h stores it’s video information (the information that is
;printed to the screen) at the memory address 0xB8000 and it takes up 4000 bytes of memory.
;Printing Character to the Screen
;The first we must do in order to print character to the screen is to get a segment register setup that points
;to the memory location 0xB8000 [= 753664 = 47104 * 16]. Remember that segments in real mode have the lower four bits implicitly
;set to zero and because each hex digit represents four bits we can easily drop the right most zero on the
;memory address when storing it in a segment register. We will use the ES segment register because we
;still want to access our data with the DS segment so we don’t run into problems when using instructions that
;implicitly use the DS segment by default.
;mov AX,0xB800 ;// = 47104
;mov ES,AX

;screen output …
;for the screen, the messages in (“muo^n loa`i” <= “muo^n loa`i va` messageA va` messageB va` messageC va` ….”) are pixels …
;(“muo^n loa`i va` pixel1 va` pixel2 va` … ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”)

screensetup: ; point ES to video memory
.setupvideosegment:
mov AX,0xB800 ;// = 47104
mov ES,AX
; to use the stack, use “call” and “ret” instead of “jmp”
; or just let the program flows, without the jmp, to instructions that follow
;jmp clearscreenpixels
ret  ; return

;Clearing the Background
;Clearing the background is rather trivial. The goal is to set all of the attribute bytes to the background color
;you wish to clear it to. The basic idea is to create a loop that will set every other byte, starting at the first
;attribute byte, to the background color we wish to clear to. We must also be sure to only clear all of the attributes that
;are used to represent the string. In other words, be sure not to go past the last attribute byte. The last attribute byte is
;found at 80 * 25 * 2 – 1. The 80 is the width and the 25 is the height. The 2 is there because two bytes make up each
;character; one for the character and one for the attribute. Finally the 1 is subtracted because our first attribute byte is
;actually the second byte at the beginning The 1 simply takes into account that we start our count at one instead of zero.

;The right most hex digit sets the lower four bits of the attribute byte. The lower four bits control the character color while the upper
;four bits (the left most hex digit) control the background color and flash bit. We set the background and flash bits (upper four bits) to 0h
; because 0h corresponds to the color black with no flashing.

;color  index hex 64-color palette index
;Black   0 00h 0
;Blue    1   01h  1
;Green   2  02h   2
;Cyan    3   03h   3
;Red    4   04h   4
;Magenta 5   05h   5
;Brown   6   06h   20
;Light Gray 7   07h   7
;Dark Gray  8   08h   56
;Bright Blue 9   09h   57
;Bright Green 10 0Ah   58
;Bright Cyan 11  0Bh   59
;Bright Red 12   0Ch   60
;Bright Magenta 13   0Dh   61
;Bright Yellow 14   0Eh   62
;Bright White 15   0Fh   63

clearscreenpixels:
mov CX,80 * 25 * 2 – 1
mov BX,1
.Loopthroughscreenpixels:
cmp BX,CX
ja .finishclearscreenpixels ;CF = 0 and ZF = 0
;ja Loads EIP with the specified address, if first operand of previous CMP instruction is greater than the second. ja is the same as jg, except that it performs an unsigned comparison.

mov byte [ES:BX],70h ;Set background to light gray
;and the text to black
;with no flashing text
add BX,2
jmp .Loopthroughscreenpixels ; jmp Loads EIP with the specified address

.finishclearscreenpixels:
; to use the stack, use “call” and “ret” instead of “jmp”
; or just let the program flows, without the jmp, to instructions that follow
;jmp exit
;jmp sayhello
ret

sayhello:
mov byte [ES:0],’H’
mov byte [ES:2],’o’
mov byte [ES:4],’p’
mov byte [ES:6],’e’
mov byte [ES:8],’ ‘
mov byte [ES:10],’W’
mov byte [ES:12],’e’
mov byte [ES:14],’l’
mov byte [ES:16],’l’

; to use the stack, use “call” and “ret” instead of “jmp”
; or just let the program flows, without the jmp, to instructions that follow
;jmp exit
ret

exit:
; to use the stack, use “call” and “ret” instead of “jmp”
; or just let the program flows, without the jmp, to instructions that follow
; jmp hang

hang:
jmp hang ; or, equivalently in nasm: jmp $
hlt  ; halt the system

times 510-($-$$) db 0 ; 2 bytes less now; $ = beginning of current line/expression = “times”, $$ = beginning of current section = “hang:”
db 0x55
db 0xAA
;********************************************
;*** NOTE ***
; from NASM manual:
;NASM gives special treatment to symbols beginning with a period. A label beginning with a single period is treated as a local label, which means that it is associated with the previous non-local label. So, for example:
;label1  ; some code
;.loop
;        ; some more code
;        jne     .loop
;        ret
;label2  ; some code
;.loop
;        ; some more code
;        jne     .loop
;        ret
;In the above code fragment, each JNE instruction jumps to the line immediately before it, because the two definitions of .loop are kept separate by virtue of each being associated with the previous non-local label.

;from http://wiki.osdev.org/Interrupts
;  if IRQ 6 is sent to the PIC by a device, the PIC would tell the CPU to service INT 0Eh, which presumably has code for interacting with whatever device sent the interrupt in the first place. Of course, there can be trouble when two or more devices share an IRQ; if you wonder how this works, check out Plug and Play.

; from http://www.techmasala.com/2006/03/31/foundation-stone-3-bios-part-2-the-interrupt-vector-table/:
;Foundation stone #3 – BIOS part 2 – The interrupt vector table
;by Ramesh on Friday,March 31, 2006 @ 9:50 am
;In my post Foundation stone #2 we saw that BIOS is the one that takes in charge when you switch on your PC. After collecting the inventory of available and properly working hardware, the BIOS sets up what is called as the Interrupts area. An interrupt is a signal to the processor that there is something that needs its attention. As such each and every piece of hardware that is put together in your PC is useless unless it is orchestrated well. Take for example the keyboard, if the attention is not given at the right time when you press a key and reciprocated accordingly wherever you are then you can call the thing that is sitting in front of you as dumb
;So when the BIOS is done with the inventory of hardware, it initializes a memory space of 1024 bytes starting at 0000:0000h (this is a representation of memory location in the form of segment:offset in hexadecimal). An interrupt is a small routine or code that has the necessary details of the interrupt and occupies 4 bytes. So starting at memory location 0000:0000h interrupts are stored. So a total of 256 interrupts can be stored in a the allotted 1024 bytes but all is not being initialized by the BIOS. There are different types of interrupts, hardware interrupts, software interrupts, user interrupts and so on. The BIOS fills up the hardware interrupts and the software interrupts are mostly added by the OS.
;The Interrupt Vector Table (IVT) is a mapping of the interrupt number and the memory location in the form of segment:offset. This memory location contains the  interrupt code for that particular interrupt. It is the responsibility of the OS to keep track of the IVT and monitor for interrupt and notify the processor. So what happens when you press a key or release a key, the keyboard send signals that contain information on what key was pressed or released. This gets stored in the memory location assigned for the keyboard interrupt (traditionally interrupt 09h is for keyboard). The OS which is constantly looking for these interrupts immediately captures the information and sends it for processing accordingly. The interrupt number and other details could differ from one BIOS manufacturer to other. You can get a lot of information about BIOS and interrupts from the BIOS central site.

; conventionally [c.f. http://en.wikipedia.org/wiki/Conventional_memory, http://en.wikipedia.org/wiki/Power-on_self-test%5D people agree upon the following memory map … from http://www.supernovah.com/Tutorials/Assembly2.php:
;Default Memory
;When the computer boots, the BIOS loads the memory with a lot of different data. This data resides in different places throughout memory and we are only left with 630Kb of memory to work with in the middle of everything. Here is a table showing the map of the memory directly after the computer boots:
;All ranges are inclusive
;Address Range (in hex)  Size   Type  Description
;0 – 3FF     1Kb    Ram   Real Mode Interrupt Vector Table (IVT)
;400 – 4FF     256 bytes   Ram   BIOS Data Area (BDA)
;500 – 9FBFF     630Kb    Ram   Free Memory
;9FC00 – 9FFFF    1Kb    Ram   Extended BIOS Area (EBDA)
;A0000 – BFFFF    128Kb  Video  Ram   VGA Frame Buffer
;C0000 – C7FFF    32Kb    Rom   Video Bios
;C8000 – EFFFF    160kb    Rom   Misc.
;F0000 – FFFFF    64Kb

; from NASM manual
;Multi-line macros are much more like the type of macro seen in MASM and TASM: a multi-line macro definition in NASM looks something like this.
;%macro  prologue 1
;        push    ebp
;        mov     ebp,esp
;        sub     esp,%1
;%endmacro

; from http://www.husseinsspace.com/teaching/udw/1996/asmnotes/chaptwo.htm:
;The SHR/SLR instructions
;format:
;SHR destination,1
;SHR destination,CL
; SHL destination,1
; SHL destination,CL
;SHR shifts the destination right bitwise either 1 position or a number of positions determined by the current value of the CL register. SHL shifts the destination left bitwise either 1 position or a number of positions determined by the current value of the CL register. The vacant positions are filled by zeros.
;example:
;shr ax,1
; shl ax,1
;The first example effectively divides ax by 2 and the second example effectively multiplies ax by 2. These commands are faster than using DIV and MUL for arithmetic involving powers of 2.

;****************************
; from Intel Programmer’s Reference Manual
;10.1 Processor State After Reset
;The contents of EAX depend upon the results of the power-up self test. The self-test may be requested externally by assertion of BUSY# at the end of RESET. The EAX register holds zero if the 80386 passed the test. A nonzero value in EAX after self-test indicates that the particular 80386 unit is faulty. If the self-test is not requested, the contents of EAX after RESET is undefined.
;DX holds a component identifier and revision number after RESET as Figure 10-1 illustrates. DH contains 3, which indicates an 80386 component. DL contains a unique identifier of the revision level.
;Control register zero (CR0) contains the values shown in Figure 10-2 . The ET bit of CR0 is set if an 80387 is present in the configuration (according to the state of the ERROR# pin after RESET). If ET is reset, the configuration either contains an 80287 or does not contain a coprocessor. A software test is required to distinguish between these latter two possibilities.
;The remaining registers and flags are set as follows:
;   EFLAGS             =00000002H
;   IP                 =0000FFF0H
;   CS selector        =000H
;   DS selector        =0000H
;   ES selector        =0000H
;   SS selector        =0000H
;   FS selector        =0000H
;   GS selector        =0000H
;   IDTR:
;              base    =0
;              limit   =03FFH
;All registers not mentioned above are undefined.
;These settings imply that the processor begins in real-address mode with interrupts disabled.
;10.2 Software Initialization for Real-Address Mode
;In real-address mode a few structures must be initialized before a program can take advantage of all the features available in this mode.
;10.2.1 Stack
;No instructions that use the stack can be used until the stack-segment register (SS) has been loaded. SS must point to an area in RAM.
;10.2.2 Interrupt Table
;The initial state of the 80386 leaves interrupts disabled; however, the processor will still attempt to access the interrupt table if an exception or nonmaskable interrupt (NMI) occurs. Initialization software should take one of the following actions: • Change the limit value in the IDTR to zero. This will cause a shutdown if an exception or nonmaskable interrupt occurs. (Refer to the 80386 Hardware Reference Manual to see how shutdown is signalled externally.)
;• Put pointers to valid interrupt handlers in all positions of the interrupt table that might be used by exceptions or interrupts.
;• Change the IDTR to point to a valid interrupt table.
;
;10.2.3 First Instructions
;After RESET, address lines A{31-20} are automatically asserted for instruction fetches. This fact, together with the initial values of CS:IP, causes instruction execution to begin at physical address FFFFFFF0H. Near (intrasegment) forms of control transfer instructions may be used to pass control to other addresses in the upper 64K bytes of the address space. The first far (intersegment) JMP or CALL instruction causes A{31-20} to drop low, and the 80386 continues executing instructions in the lower one megabyte of physical memory. This automatic assertion of address lines A{31-20} allows systems designers to use a ROM at the high end of the address space to initialize the system.

; from http://en.wikipedia.org/wiki/Interrupt_descriptor_table
;In the 8086 processor, the IDT resides at a fixed location in memory from address 0x0000 to 0x03ff, and consists of 256 four-byte real mode pointers (256 × 4 = 1024 bytes of memory). In the 80286 and later, the size and locations of the IDT can be changed in the same way as it is done in protected mode, though it does not change the format of it. A real mode pointer is defined as a 16-bit segment address and a 16-bit offset into that segment. A segment address is expanded internally by the processor to 20 bits thus limiting real mode interrupt handlers to the first 1 megabyte of addressable memory. The first 32 vectors are reserved for the processor’s internal exceptions, and hardware interrupts may be mapped to any of the vectors by way of a programmable interrupt controller.
; A commonly used x86 real mode interrupt is INT 10, the Video BIOS code to handle primitive screen drawing functions such as pixel drawing and changing the screen resolution.
; from http://software.intel.com/en-us/articles/introduction-to-x64-assembly
;   XOR EAX, EAX ; zero out eax
;   MOV  ECX, 10  ; loop 10 times
;Label:   ; this is a label in assembly
;   INX  EAX    ; increment eax
;   LOOP  Label  ; decrement ECX, loop if not 0

; from https://courses.engr.illinois.edu/ece390/books/artofasm/CH06/CH06-5.html#HEADING5-294
;                mov     ecx, 255
;ArrayLp:        mov     Array[ecx], cl
;                loop    ArrayLp
;                mov     Array[0], 0
;The last instruction is necessary because the loop does not repeat when cx is zero. Therefore, the last element of the array that this loop processes is Array[1], hence the last instruction.
; The loop instruction does not affect any flags.

; 2.17.2014 chu’ Ha^n telephoned about obtaining literature on American Philosophy and on US Census Data particularly
; US Census Data on black population expansion into US and into the world …
; following day:  couple resembling co^ Be^ and David Lowe seen at Post Office when we tried to mail chu’ Kha’s preserved fruit to father in Michigan
; from http://randomascii.wordpress.com/2012/12/29/the-surprising-subtleties-of-zeroing-a-register/
; also see http://navet.ics.hawaii.edu/~casanova/courses/ics312_spring14/slides/ics312_bits_2.pdf
;Tabula rasa
;The x86 instruction set does not have a special purpose instruction for zeroing a register. An obvious way of dealing with this would be to move a constant zero into the register, like this:
;mov eax, 0
;That works, and it is fast. Benchmarking this will typically show that it has a latency of one Sandybridge diecycle – the result can be used in a subsequent instruction on the next cycle. Benchmarking will also show that this has a throughput of three-per-cycle. The Sandybridge documentation says that this is the maximum integer throughput possible, and yet we can do better.
;It’s too big
;The x86 instruction used to load a constant value such as zero into eax consists of a one-byte opcode (0xB8) and the constant to be loaded. The problem, in this scenario, is that eax is a 32-bit register, so the constant is 32-bits, so we end up with a five-byte instruction:
;B8 00 00 00 00       mov         eax, 0
;Instruction size does not directly affect performance – you can create lots of benchmarks that will prove that it is harmless – but in most real programs the size of the code does have an effect on performance. The cost is extremely difficult to measure, but it appears that instruction-cache misses cost 10% or more of performance on many real programs. All else being equal, reducing instruction sizes will reduce i-cache misses, and therefore improve performance to some unknown degree.
;Smaller alternatives
;Many RISC architectures have a zero register in order to optimize this particular case, but x86 does not. The recommended alternative for years has been to use xor eax, eax. Any register exclusive ored with itself gives zero, and this instruction is just two bytes long:
;33 C0                xor         eax, eax
;Careful micro-benchmarking will show that this instruction has the same one-cycle latency and three-per-cycle throughput of mov eax, 0 and it is 60% smaller (and recommended by Intel), so all is well.
;Suspicious minds
;If you really understand how CPUs work then you should be concerned with possible problems with using xor eax, eax to zero the eax register. One of the main limitations on CPU performance is data dependencies. While a Sandybridge processor can potentially execute three integer instructions on each cycle, in practice its performance tends to be lower because most instructions depend on the results of previous instructions, and are therefore serialized. The xor eax, eax instruction is at risk for such serialization because it uses eax as an input. Therefore it cannot (in theory) execute until the last instruction that wrote to eax completes. For example, consider this code fragment below:
;1: add eax, 1
;2: mov ebx, eax
;3: xor eax, eax
;4: add eax, ecx
;Careful micro-benchmarking will show that this instruction has the same one-cycle latency and three-per-cycle throughput of mov eax, 0 and it is 60% smaller (and recommended by Intel), so all is well.
;Ideally we would like our awesome out-of-order processor to execute instructions 1 and 3 in parallel. There is a literal data dependency between them, but a sufficiently advanced processor could detect that this dependency is artificial. The result of the xor instruction doesn’t depend on the value of eax, it will always be zero.
;It turns out that for x86 processors have for years handled xor of a register with itself specially. Every out-of-order Intel and AMD processor that I am aware of can detect that there is not really a data dependency and it can execute instructions 1 and 3 in parallel. Which is great. The CPUs use register renaming to ‘create’ a new eax for the sequence of instructions starting with instruction 3.
; from http://stackoverflow.com/questions/4909563/why-should-code-be-aligned-to-even-address-boundaries-on-x86
;Because the (16 bit) processor can fetch values from memory only at even addresses, due to its particular layout: it is divided in two “banks” of 1 byte each, so half of the data bus is connected to the first bank and the other half to the other bank. Now, suppose these banks are aligned (as in my picture), the processor can fetch values that are on the same “row”.
;  bank 1   bank 2
;+——–+——–+
;|  8 bit | 8 bit  |
;+——–+——–+
;|        |        |
;+——–+——–+
;| 4      | 5      | <– the CPU can fetch only values on the same “row”
;+——–+——–+
;| 2      | 3      |
;+——–+——–+
;| 0      | 1      |
;+——–+——–+
; \      / \      /
;  |    |   |    |
;  |    |   |    |
; data bus  (to uP)

;Now, since this fetch limitation, if the cpu is forced to fetch values which are located on an odd address (suppose 3), it has to fetch values at 2 and 3, then values at 4 and 5, throw away values 2 and 5 then join 4 and 3 (you are talking about x86, which as a little endian memory layout).
; That’s why is better having code (and data!) on even addresses.
;PS: On 32 bit processors, code and data should be aligned on addresses which are divisible by 4 (since there are 4 banks).
;Hope I was clear. 🙂
;share|improve this answer
;answered Feb 5 ’11 at 23:02
;BlackBear
;9,42131746
;bio
;website google.it
;location Trento, Italy
;age 19

; from http://lemire.me/blog/archives/2012/05/31/data-alignment-for-speed-myth-or-reality/
;Conclusion: On recent Intel processors, data alignment does not make processing measurably faster. Data alignment for speed is a myth.
;Acknowledgement: I am grateful to Owen Kaser for pointing me to the references on this issue.
;http://lemire.me/blog/archives/2012/05/31/data-alignment-for-speed-myth-or-reality/

2.9.2014
#ifndef UNICODE
#define UNICODE
#endif

#ifndef _UNICODE
#define _UNICODE
#endif

#include <stdio.h>
#include <windows.h>

void AppendExample (void);

int main(int argc, char **argv)
{
printf(“hello world\n”);

/* from http://support.microsoft.com/kb/100027
To open a physical hard drive for direct disk access (raw I/O) in a Win32-based application, use a device name of the form
\\.\PhysicalDriveN
where N is 0, 1, 2, and so forth, representing each of the physical drives in the system.

To open a logical drive, direct access is of the form
\\.\X:
where X: is a hard-drive partition letter, floppy disk drive, or CD-ROM drive.
Collapse imageMORE INFORMATION

You can open a physical or logical drive using the CreateFile() application programming interface (API) with these device names provided that you have the appropriate access rights to the drive (that is, you must be an administrator). You must use both the CreateFile() FILE_SHARE_READ and FILE_SHARE_WRITE flags to gain access to the drive.

Once the logical or physical drive has been opened, you can then perform direct I/O to the data on the entire drive. When performing direct disk I/O, you must seek, read, and write in multiples of sector sizes of the device and on sector boundaries. Call DeviceIoControl() using IOCTL_DISK_GET_DRIVE_GEOMETRY to get the bytes per sector, number of sectors, sectors per track, and so forth, so that you can compute the size of the buffer that you will need.

Note that a Win32-based application cannot open a file by using internal Windows NT object names; for example, attempting to open a CD-ROM drive by opening
\Device\CdRom0
does not work because this is not a valid Win32 device name. An application can use the QueryDosDevice() API to get a list of all valid Win32 device names and see the mapping between a particular Win32 device name and an internal Windows NT object name. An application running at a sufficient privilege level can define, redefine, or delete Win32 device mappings by calling the DefineDosDevice() API.
*/
/* from http://compnetworking.about.com/od/windowsnetworking/g/unc-name.htm
* Definition: UNC is a naming convention used primarily to specify and map network drives in Microsoft Windows. Support for UNC also appears in other operating systems via technologies like Samba. UNC names are most commonly used to reach file servers or printers on a LAN.
UNC Name Syntax

UNC names identify network resources using a specific notation. UNC names consist of three parts – a server name, a share name, and an optional file path. These three elements are combined using backslashes as follows:
\\server\share\file_path The server portion of a UNC name references the strings maintained by a network naming service such as DNS or WINS. Server names are set by a system administrator.
The share portion of a UNC name references a label created by an administrator or, in some cases, within the operating system. In most versions of Microsoft Windows, for example, the built-in share name admin$ refers to the root directory of the operating system installation (usually C:\WINNT or C:\WINDOWS).

The file path portion of a UNC name references the local subdirectories beneath the share point.

UNC Name Examples
Consider a standard Windows XP computer named teela. In addition to the built-in admin$ share, say you have also defined a share point called temp that is located at C:\temp. Using UNC names, you would connect to folders on teela as follows: • \\teela\admin$ (to reach C:\WINNT)
• \\teela\admin$\system32 (to reach C:\WINNT\system32)
• \\teela\temp (to reach C:\temp)
Using Windows Explorer or the DOS command prompt, and with proper security credentials, you can map network drives and remotely access folders on a computer by specifying the UNC names.
*/
/* CODE from http://stackoverflow.com/questions/11517566/createfile-function-in-visual-c */
/*
DWORD lastError = ERROR_SUCCESS;
BOOL bTest=FALSE;
DWORD dwNumRead=0;
HANDLE hFile=CreateFile(L”D:\\a.dat”,GENERIC_READ,FILE_SHARE_READ,
NULL, CREATE_ALWAYS, FILE_ATTRIBUTE_NORMAL,NULL);
lastError = GetLastError();
bTest= CloseHandle(hFile);
*/
AppendExample();
return 0;
}

/* following code inspire and found by Google by Gia Ba?o playing with Thanh So+n */
/* following AppendExample code is from http://msdn.microsoft.com/en-us/library/ms900134.aspx */
void AppendExample (void)
{
HANDLE hFile, hAppend;
DWORD dwBytesRead, dwBytesWritten, dwPos;
char buff[4096];
TCHAR szMsg[1000];
// #define  LPSTR          char*
// #define  LPCSTR         const char*
// #define  LPWSTR         wchar_t*
// #define  LPWCSTR        const wchar_t*
// #define  LPTSTR         TCHAR*
// #define  LPCTSTR        const TCHAR*

//  from http://www.cplusplus.com/articles/2w6AC542/, Note:
// #define  LPSTR          char*
// #define  LPCSTR         const char*
// #define  LPWSTR         wchar_t*
// #define  LPWCSTR        const wchar_t* // he means “typedef const wchar_t* LPCWSTR;” from http://msdn.microsoft.com/en-us/library/cc230352.aspx
// #define  LPTSTR         TCHAR*
// #define  LPCTSTR        const TCHAR*
//  Remember that TCHAR is char or wchar_t depending on Unicode.
//  WinAPI provides some other macros, _T(), T(), and TEXT(),
//  all of which do the same thing. In a Unicode build, they put
//  the L before the string literal to make it wide, and in
//  non-Unicode, they do nothing. Therefore they will always work hand in hand with TCHARs:
//  const TCHAR*   d = _T(“foo”);  // works in both Unicode and ANSI builds

//  const TCHAR* vhdfile = TEXT(“C:\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”);
//  const TCHAR* bootloaderfile = TEXT(“C:\Users\LaptopUser\My Programs\My OS\try2.bin”);
//  const TCHAR* vhdfile = _TEXT(“C:\\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”);
//  const TCHAR* bootloaderfile = _TEXT(“C:\\Users\LaptopUser\My Programs\My OS\try2.bin”);

// following correction to string representing vhdfile and bootloaderfile is courtesy of
// Gia Ba?o’s mother and aunts “tu+” or “di` tu+”, “di` ba” … and of To^n DDi.nh’s friend “DDa.t” who
// would resemble “Pak-Ming Ho” … MingW compiler … and who played the Eagles “Hotel California” no-escape song … Di.nh said “you made me poor all the time …” “because of you I’m poor ….” … as well as Adele and “on the road again” ca` cho+’n songs
/*from http://stackoverflow.com/questions/20630072/parse-string-to-lpcwstr
*The point is that by boost filesystem I get a string such as
string filename=”C:\Users\MyUser\Desktop\PDN.pdf”;
and I need to convert this string to a LPCWSTR.
Because of this I have done several tries which have all failed, for example:
HANDLE hFile = CreateFile((LPCWSTR)fileName.c_str(), GENERIC_READ, FILE_SHARE_READ, NULL, OPEN_EXISTING, NULL, NULL);
But when doing this, it succeded:
HANDLE hFile = CreateFile(L”C:\\Users\\MyUSer\\Desktop\\PDN.pdf”, GENERIC_READ, FILE_SHARE_READ, NULL, OPEN_EXISTING, NULL, NULL);
So my question is, how could I parse a string to a PWSTR using a string variable? And if possible (I guess no), is there any function that will change the original path adding a slash where finds another slash?
Thanks a lot
*/
/* also from http://gcc.gnu.org/ml/gcc-help/2002-02/msg00043.html
Kabir Patel wrote:
>  warning: unknown escape sequence ‘\)’
Backslash is used as an escaping character for C strings; if you’d like
to include a character that you wouldn’t normally be able to represent
in a text file then you can use an escape code for it, for example:
\t    tab (ASCII 9)
\n    newline (ASCII 10)
\r    carriage return (ASCII 13)
\001  character with octal value 001
\xAB  character with hexadecimal value AB
but since backslash has been overloaded, an escape is necessary to
actually embed a backslash:
\\    backslash
*/

// from http://www.tenouk.com/cpluscodesnippet/createfilegetclosehandleinfo.html:
// LPCWSTR fname = L”c:\\testfile.txt”;
// LPCWSTR vhdfile = L”C:\\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”;   // evidently this name is too long …
// LPCWSTR bootloaderfile = L”C:\\Users\LaptopUser\My Programs\My OS\try2.bin”; // evidently this name is too long …
// LPCWSTR vhdfile = “\\?\C:\\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”;   // evidently this name is too long …
// LPCWSTR bootloaderfile = “\\?\C:\\Users\LaptopUser\My Programs\My OS\try2.bin”; // evidently this name is too long …
LPCWSTR vhdfile = L”\\\\?\\C:\\Users\\LaptopUser\\Documents\\VHDs\\My OS raw.vhd”;   // evidently this name is too long …
LPCWSTR bootloaderfile = L”\\\\?\\C:\\Users\\LaptopUser\\My Programs\\My OS\\try2.bin”; // evidently this name is too long …

// from winbase.h
// WINBASEAPI HANDLE WINAPI CreateFileA(LPCSTR,DWORD,DWORD,LPSECURITY_ATTRIBUTES,DWORD,DWORD,HANDLE);
// WINBASEAPI HANDLE WINAPI CreateFileW(LPCWSTR,DWORD,DWORD,LPSECURITY_ATTRIBUTES,DWORD,DWORD,HANDLE);

// Open the existing file.

// the vhd file is “C:\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”
// the bootloader file is “C:\Users\LaptopUser\My Programs\My OS\try2.bin”
/*
hFile = CreateFile (TEXT(“\\ONE.TXT”),      // Open One.txt
GENERIC_READ,           // Open for reading
0,                      // Do not share
NULL,                   // No security
OPEN_EXISTING,          // Existing file only
FILE_ATTRIBUTE_NORMAL,  // Normal file
NULL);                  // No template file
*/
// hFile = CreateFileW (“\\?\C:\Users\LaptopUser\My Programs\My OS\try2.bin”,      // Open One.txt
// hFile = CreateFileW (L”C:\\Users\LaptopUser\My Programs\My OS\try2.bin”,      // Open One.txt
// hFile = CreateFileW (L”C:\\Users\LaptopUser\My Programs\My OS\try2.bin”,      // Open One.txt
// hFile = CreateFileW (bootloaderfile,      // Open One.txt
hFile = CreateFile (bootloaderfile,      // Open One.txt
GENERIC_READ,           // Open for reading
0,                      // Do not share
NULL,                   // No security
OPEN_EXISTING,          // Existing file only
FILE_ATTRIBUTE_NORMAL,  // Normal file
NULL);                  // No template file

if (hFile == INVALID_HANDLE_VALUE)
{
DWORD dwErr = GetLastError();
// Your error-handling code goes here.
//    wsprintf (szMsg, TEXT(“Could not open ONE.TXT”));
wsprintf (szMsg, TEXT(“Could not open bootloader file”));
return;
}

// the vhd file is “C:\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”

// Open the existing file, or, if the file does not exist,
// create a new file.
/*
hAppend = CreateFile (TEXT(“\\TWO.TXT”),      // Open Two.txt.
GENERIC_WRITE,          // Open for writing
0,                      // Do not share
NULL,                   // No security
OPEN_ALWAYS,            // Open or create
FILE_ATTRIBUTE_NORMAL,  // Normal file
NULL);                  // No template file
*/
// hAppend = CreateFileW (“\\?\C:\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”,      // Open Two.txt.
// hAppend = CreateFileA (“C:\\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”,      // Open Two.txt.
// hAppend = CreateFileW (L”C:\\Users\LaptopUser\Documents\VHDs\My OS raw.vhd”,      // Open Two.txt.
// hAppend = CreateFileW (vhdfile,      // Open Two.txt.
hAppend = CreateFile (vhdfile,      // Open Two.txt.
GENERIC_WRITE,          // Open for writing
0,                      // Do not share
NULL,                   // No security
OPEN_ALWAYS,            // Open or create
FILE_ATTRIBUTE_NORMAL,  // Normal file
NULL);                  // No template file

if (hAppend == INVALID_HANDLE_VALUE)
{
DWORD dwErr = GetLastError();
//wsprintf (szMsg, TEXT(“Could not open TWO.TXT”));
wsprintf (szMsg, TEXT(“Could not open raw vhd drive”));
CloseHandle (hFile);            // Close the first file.
return;
}

// Append the first file to the end of the second file.

// dwPos = SetFilePointer (hAppend, 0, NULL, FILE_END);
dwPos = SetFilePointer (hAppend, 0, NULL, FILE_BEGIN);
do
{
if (ReadFile (hFile, buff, 4096, &dwBytesRead, NULL))
{
WriteFile (hAppend, buff, dwBytesRead,
&dwBytesWritten, NULL);
}
}
while (dwBytesRead == 4096);

// Close both files.

CloseHandle (hFile);
CloseHandle (hAppend);

return;
} // End of AppendExample code

1/27/2014
“tu+” or di` Die^.p or di` Tu+ wears a tattered blue jean signifying fragmentation/segmentation and shys away from ba’c Ty’ anh Ty’ ….

fragmentation/segmentation and design for a computer file system …. : close-packing of circles and spheres …

http://i.stack.imgur.com/XJxrT.png

http://www.cut-the-knot.org/Curriculum/Geometry/InversionInArbelos.shtml

oil bubbles: to^nan helps mother la`m co^~ chay cho/ho^m mu`ng mo^.t te^’t …

the Bissel deep carpet cleaner container uses a bladder to accomplish the feat of using one container space for both clean solution and dirty return solution [“what’s garbage to one man is treasure to another man”: Statue of Liberty Emma Lazarus “Give your refuse …” …]: this means that clean/dirty solution is “co-variant” or Buddhist Conditional Genesis “THIS arises; THAT arises” in much the same manner as the oil bubbles and in much the same manner as the files in a file system on a hard drive …

http://www.getcookingblog.com/wp-content/uploads/2010/05/chicken-frying.jpg 

golden shadows of faucet handles made by floodlight directly above it … segment:offset memory addressing scheme of intel ia32 architecture ….

 fern leaves:  fragmentation/segmentation in nature such as leave/leaf form allows for tro+`I sinh tro+`I du+o+~ng every parts of a plant, every plants of a forest, every forests of the planet … kho^ng ma(.c ke^. ai … “God cares for even the fallen sparrow and the lilies of the field, how much more would he care for you …” … co^ Die^.p provides copper-green coconut cracker by “Jans” … and orchid that turns copper-yellow and bu+o+?I bu+o+?I in yellow at te^’t lunch in Grand Century Mall …

everything existing is covariant … every computer filing system existing is covariant: so the point is any newly designed computer file system should also be covariant …

http://www.landcraftenvironment.com/mm5/graphics/00000001/FERN-BFl.jpg

Note: there is a re-scaling [] in the fractal illustration above …Note: there is a re-scaling [] in the fractal illustration above …

Note: there is a re-scaling [] in the fractal illustration above …

[H61] “Program Organization and Record Keeping for Dynamic Storage”
A.W. Holt
Communications of the ACM, Volume 4, Issue 10, October 1961
An incredibly early and difficult to read paper about segmentation and some of its uses.
[G62] “Fact Segmentation”
M. N. Greenfield
Proceedings of the SJCC, Volume 21, May 1962
Another early paper on segmentation; so early that it has no references to other work.
http://www.pages.cs.wisc.edu/…/vm-segmentation.pdf …

Sam Biddle on Gizmodo
Tupac hologram
Tupac Hologram Wasn’t a Hologram

http://gizmodo.com/5902625/tupac-hologram-wasnt-a-hologram

holo-memory http://static.ddmcdn.com/gif/holo-memory.gif … the segment:offset metaphorical addressing scheme of intel i32a architecture or computer file system fragmentation/segmentation over time due to usage would fain imitate an “interference pattern” such as the interference pattern of a laser hologram …

overheard some one or some child rapping: …Tupac Hologram Performs at Coachella ….

2/4/2014 yesterday di` ba, and day after te^’t ye^’n stimulating gia ba?o, lies– as though on ba’c si~ ta^m tha^`n psychologist’s couch– under to^n ddi.nh’s who just came home from work sounding sinus problems to take out the garbage 3d painting: remember that before we left michigan for california was reading theosophy article by father that leads to laser memory …. something to keep in mind when designing a computer filing system:
“In order to understand how the whole can exist in every part, Bohm became interested in the mechanics of holographic photography. Using lasers, a holographic image is recorded evenly across the photographic film. Consequently any region of the film contains information about the whole image, so any small region of the film can recreate the image, although in poorer resolution than the entire film produces.” http://everythingforever.com/Bohm.htm

The development of the laser enabled the first practical optical holograms that recorded 3D objects to be made in 1962 by Yuri Denisyuk in the Soviet Union[5] and by Emmett Leith and Juris Upatnieks at the University of Michigan, USA.[

http://en.wikipedia.org/wiki/Holography

To^nDDi.nh’s washroom used following old-fashioned faucet style directly under a floodlight that casts a metallic reflection shadow off the faucet handles in the form of two intersecting circles …

“Vo^ du.ng ddo^` vo^ du.ng …” [Ecclesiastes “Vanity, vanity, all is vanity. There’s nothing new under the sun”: refering to when things have achieved their Eternal zero-footprint Buddhist “Middle Path” on which they “see/hear/say no evil/use” or have achieved Confucius “will of heaven” “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well” or have achieved Confucius equilibrium–“Let the states of equilibrium and harmony exist in perfection, and a happy order will prevail throughout heaven and earth, and all things will be nourished and flourish.” Doctrine of the Mean–] said Japan Lao-Tzu generation to Japan Confucius generation:  somewhere between notes 1.17.2014 and 1.19.2014 bought Power Ranger Shinkenger for Gia Ba?o …. his mother Ye^’n wore beauty facial at night and his father So+n bought him a red ranger mask and Gia Ba?o got a bad case of if not star warshttp://www.cnn.com/2014/01/17/world/asia/japan-philippines-ww2-soldier-dies/ asthma then coughing …

https://stoppauseplayfastforwardrewindejectrecord.net/wp-content/uploads/2014/01/31bed-new.jpgThe Shiba Clan, who has said 17 other generations before, have been fighting the Gedoushuu, beings born from the Sanzu River who have fallen into despair and live literally “off the beaten path”, for hundreds of years. The Gedoushuu are led by the merciless and ferocious supreme general, Chimatsuri Doukoku. The young Lord of the Shiba clan, Takeru Shiba, has taken under his wing four retainers who have been raised from childhood to be samurai, and together with the Samurai power known as Mojikara, they henshin into the Shinkengers and fight against the Gedoushuu and their servants, the Ayakashi, in order to seal Doukoku and bring peace to the world again.

The story of Shinkenger is both very simple and yet very complex all at the same time, but that is the beauty of it in general. On the outside, it is a show about a Samurai leader and his retainers fighting against a powerful foe, but on the inside, Shinkenger is about not only what being a retainer, a lord, and what being on a team means, but about what it means to conform and not to conform, what it means to rejoice the good times, to suffer the bad, and most importantly, what it truly means to live on and off the beaten path. This not only goes for the main heroes of the story, but also for the Gedoushuu as well, and from a psychological standpoint, the ideas presented are very interesting and thought provoking. The head writer of Shinkenger was Yasuko Kobayashi, who is best known for her writings of Shakugan no Shana, Claymore, and, oh yeah…ATTACK ON TITAN….yeah. She is also no stranger to the Toku genre as she was head writer for shows like Gingaman, Timeranger, Kamen Rider Ryuki, and Kamen Rider Den-O. Because of this, you probably expect some pretty damn good storytelling, and Shinkenger is no exception to this rule. The writing is very strong, the developments in the story and in the characters for the most part are very consistent, and Kobayashi really brings the heart and soul of these characters to life in such a fantastic way.

One thing I love about Shinkenger in particular is how plot points carry over from one episode to another. Even filler episodes feel like they have significance in helping develop the story, and without those fillers we wouldn’t be able to know these characters, understand them, and connect with them like we do. Some filler episodes do serve no real purpose in the overall story, but all of them are still very entertaining as is. With all these elements and more put together, it creates a wonderful story that keeps you invested from beginning to end throughout the 49 episode period! If I had only one real complaint, it would be that the aspects of Mojikara and what it is are never really explained, which in turn bugs me when some episodes try to focus on increasing Mojikara. That is just a small nitpick of mine though and not something to worry about too much in the grand scheme of things.
……..
The back stories of Juuzou and Dayuu falling to Gedou due to their dark lives and pasts are not only heartbreaking and get you invested in the resolve of the Gedoushuu to an extent. It creates an interesting dynamic of the Gedoushuu and who they were before falling into despair. What is so fascinating about this specifically is that the main goal of the Gedoushuu is to bring humans into despair in order to increase the amount of water in the Sanzu River. Hmm…interesting when you think about it, ain’t it?

http://thetokubuster.blogspot.com/
the sushi seller: Shinkenger Gold Power Ranger Genta Umemori
http://supersentaiimages.blogspot.com/2009/06/ranger-profile-shinkenger-shinken-gold.html
Tokyo (CNN) — A Japanese soldier who hunkered down in the jungles of the Philippines for nearly three decades, refusing to believe that World War II had ended, has died in Tokyo. Hiroo Onoda was 91 years old.
In 1944, Onoda was sent to the small island of Lubang in the western Philippines to spy on U.S. forces in the area. Allied forces defeated the Japanese imperial army in the Philippines in the latter stages of the war, but Onoda, a lieutenant, evaded capture. While most of the Japanese troops on the island withdrew or surrendered in the face of oncoming American forces, Onoda and a few fellow holdouts hid in the jungles, dismissing messages saying the war was over.
For 29 years, he survived on food gathered from the jungle or stolen from local farmers.
After losing his comrades to various circumstances, Onoda was eventually persuaded to come out of hiding in 1974.
His former commanding officer traveled to Lubang to see him and tell him he was released from his military duties.
In his battered old army uniform, Onoda handed over his sword, nearly 30 years after Japan surrendered..
2011: Japanese WWII vets honored
“Every Japanese soldier was prepared for death, but as an intelligence officer I was ordered to conduct guerrilla warfare and not to die,” Onoda told CNN affiliate, the Australian Broadcasting Corporation. “I had to follow my orders as I was a soldier.”
He returned to Japan, where he received a hero’s welcome, a figure from a different era emerging into post-war modernity.
But anger remained in the Philippines, where he was blamed for multiple killings.
The Philippines government pardoned him. But when he returned to Lubang in 1996, relatives of people he was accused of killing gathered to demand compensation.
After his return to Japan, he moved to Brazil in 1975 and set up a cattle ranch.
“Japan’s philosophy and ideas changed dramatically after World War II,” Onoda told ABC. “That philosophy clashed with mine so I went to live in Brazil.”
http://www.cnn.com/2014/01/17/world/asia/japan-philippines-ww2-soldier-dies/

http://ecx.images-amazon.com/images/I/41l97Jk1BpL.jpg

golden shadows of faucet handles made by floodlight directly above it ….. segmentation…. segment:offset memory addressing scheme of intel ia32 architecture ….

http://ecx.images-amazon.com/images/I/41l97Jk1BpL.jpg

golden shadows of faucet handles made by floodlight directly above it ….. segmentation…. segment:offset memory addressing scheme of intel ia32 architecture ….

golden shadows of faucet handles made by floodlight directly above it … segment:offset memory addressing scheme of intel ia32 architecture ….
golden shadows of faucet handles made by floodlight directly above it ….. segmentation…. segment:offset memory addressing scheme of intel ia32 architecture …. or file system fragmentation/segmentation

; nasmw boot.asm -f bin -o boot.bin
; partcopy boot.bin 0 200 -f0

[ORG 0x7c00]      ; add to offsets
xor ax, ax    ; make it zero
mov ds, ax   ; DS=0
mov ss, ax   ; stack starts at 0
mov sp, 0x9c00   ; 200h past code start

mov ax, 0xb800   ; text video memory
mov es, ax

mov si, msg   ; show text string
call sprint

mov ax, 0xb800   ; look at video mem
mov gs, ax
mov bx, 0x0000   ; ‘W’=57 attrib=0F
mov ax, [gs:bx]

mov  word [reg16], ax ;look at register
call printreg16

hang:
jmp hang

;———————-
dochar:   call cprint         ; print one character
sprint:   lodsb      ; string char to AL
cmp al, 0
jne dochar   ; else, we’re done
add byte [ypos], 1   ;down one row
mov byte [xpos], 0   ;back to left
ret

cprint:   mov ah, 0x0F   ; attrib = white on black
mov cx, ax    ; save char/attribute
movzx ax, byte [ypos]
mov dx, 160   ; 2 bytes (char/attrib)
mul dx      ; for 80 columns
movzx bx, byte [xpos]
shl bx, 1    ; times 2 to skip attrib

mov di, 0        ; start of video memory
add di, ax      ; add y offset
add di, bx      ; add x offset

mov ax, cx        ; restore char/attribute
stosw              ; write char/attribute
add byte [xpos], 1  ; advance to right

ret

;————————————

printreg16:
mov di, outstr16
mov ax, [reg16]
mov si, hexstr
mov cx, 4   ;four places
hexloop:
rol ax, 4   ;leftmost will
mov bx, ax   ; become
and bx, 0x0f   ; rightmost
mov bl, [si + bx];index into hexstr
mov [di], bl
inc di
dec cx
jnz hexloop

mov si, outstr16
call sprint

ret

;————————————

xpos   db 0
ypos   db 0
hexstr   db ‘0123456789ABCDEF’
outstr16   db ‘0000’, 0  ;register value string
reg16   dw    0  ; pass values to printreg16
msg   db “What are you doing, Dave?”, 0
times 510-($-$$) db 0
db 0x55
db 0xAA
;==================================

Microsoft Windows [Version 6.1.7601]
Copyright (c) 2009 Microsoft Corporation.  All rights reserved.

C:\Windows\system32>cd ../..

C:\>di
‘di’ is not recognized as an internal or external command,
operable program or batch file.

C:\>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\

12/02/2010  10:00 AM    <DIR>          Intel
12/02/2010  10:28 AM    <DIR>          mfg
12/02/2006  02:37 AM           904,704 msdia80.dll
02/22/2011  07:11 PM    <DIR>          PerfLogs
01/12/2014  08:05 AM    <DIR>          Program Files
01/12/2014  08:04 AM    <DIR>          Program Files (x86)
12/02/2010  09:58 AM               207 setup.log
01/15/2014  02:07 AM    <DIR>          swshare
02/12/2011  05:09 AM    <DIR>          SWTOOLS
05/01/2012  09:46 PM    <DIR>          TKaraokeRecord
02/22/2011  11:16 PM             1,732 tvtpktfilter.dat
12/09/2011  12:48 PM    <DIR>          Users
01/16/2014  01:29 PM    <DIR>          Windows
3 File(s)        906,643 bytes
10 Dir(s)  366,169,477,120 bytes free

C:\>cd Users

C:\Users>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users

12/09/2011  12:48 PM    <DIR>          .
12/09/2011  12:48 PM    <DIR>          ..
01/16/2014  01:29 PM    <DIR>          Administrator
01/16/2014  01:29 PM    <DIR>          Guest
01/16/2014  10:31 AM    <DIR>          LaptopUser
12/02/2010  10:19 AM    <DIR>          Public
0 File(s)              0 bytes
6 Dir(s)  366,169,497,600 bytes free

C:\Users>cd LaptopUser

C:\Users\LaptopUser>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users\LaptopUser

01/16/2014  10:31 AM    <DIR>          .
01/16/2014  10:31 AM    <DIR>          ..
01/16/2014  01:29 PM    <DIR>          Contacts
09/24/2013  06:41 PM    <DIR>          Desktop
01/13/2014  01:53 AM    <DIR>          Documents
09/24/2013  06:41 PM    <DIR>          Downloads
01/22/2014  06:37 AM    <DIR>          Favorites
09/24/2013  06:41 PM    <DIR>          Links
09/24/2013  06:41 PM    <DIR>          Music
01/23/2014  07:56 PM    <DIR>          My Programs
01/12/2014  05:27 AM    <DIR>          Pictures
09/24/2013  06:41 PM    <DIR>          Saved Games
09/24/2013  06:41 PM    <DIR>          Searches
08/18/2011  08:41 PM    <DIR>          Tracing
09/24/2013  06:41 PM    <DIR>          Videos
0 File(s)              0 bytes
15 Dir(s)  366,169,497,600 bytes free

C:\Users\LaptopUser>cd “My Programs”

C:\Users\LaptopUser\My Programs>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users\LaptopUser\My Programs

01/23/2014  07:56 PM    <DIR>          .
01/23/2014  07:56 PM    <DIR>          ..
01/16/2014  10:02 AM             2,395 1.16.2014.rtf
01/16/2014  01:17 PM            15,018 12014a.rtf
01/18/2014  12:10 AM            26,038 Addressable Memory.htm
01/18/2014  12:10 AM    <DIR>          Addressable Memory_files
01/16/2014  01:13 PM           462,270 BCDedit_reff.pdf
01/19/2014  12:15 PM             3,202 boot.txt
01/13/2014  03:12 AM    <DIR>          CodeLite 5.0
01/13/2014  03:08 AM        34,591,503 codelite-5.0.6213-mingw4.7.1.exe
01/06/2014  12:45 AM        37,137,789 codelite-5.3-mingw4.7.1.exe.7z
01/14/2014  09:26 PM           310,818 Introduction_to_x64_Assembly.pdf
01/17/2014  11:53 PM            13,188 MEMMAP.gif
01/18/2014  12:09 AM            31,014 memorymap.jpg
01/13/2014  03:13 AM    <DIR>          MinGW-4.7.1
01/13/2014  04:06 AM    <DIR>          mingw-w64-bin_i686-mingw_20111217
01/13/2014  03:59 AM       373,637,163 mingw-w64-bin_i686-mingw_20111217.zip
01/13/2014  03:48 AM         7,021,162 mingw-w64-v3.1.0.tar.bz2
01/15/2014  02:51 AM           346,101 minimal-intel-architecture-boot-loader-paper.pdf
01/13/2014  04:05 AM        51,009,681 MSYS-20111123.zip
01/23/2014  08:41 AM    <DIR>          My OS
01/13/2014  03:43 AM    <DIR>          nasm-2.10.09-win32
01/06/2014  12:49 AM           539,074 nasm-2.10.09-win32.zip
01/17/2014  11:54 PM            39,164 PC memory map definition of PC memory map in the Fr
ee Online Encyclopedia_.htm
01/17/2014  11:54 PM    <DIR>          PC memory map definition of PC memory map in the Fr
ee Online Encyclopedia__files
01/13/2014  02:34 AM    <DIR>          Projects
01/16/2014  04:41 PM            28,672 savedbcd.bcd
01/18/2014  12:53 AM           134,240 vga_reference_manual_20090620.zip
01/23/2014  07:56 PM            51,326 Will the real Real Mode please stand up  OS-2 Museu
m.htm
01/23/2014  07:56 PM    <DIR>          Will the real Real Mode please stand up  OS-2 Museu
m_files
01/12/2014  08:06 AM    <DIR>          windows software development
01/12/2014  07:56 AM           509,264 winsdk_web.exe
08/18/2012  07:11 PM    <DIR>          XnView-win
08/18/2012  07:09 PM         6,720,296 XnView-win.zip
21 File(s)    512,629,378 bytes
13 Dir(s)  366,169,497,600 bytes free

C:\Users\LaptopUser\My Programs>cd “My OS”

C:\Users\LaptopUser\My Programs\My OS>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users\LaptopUser\My Programs\My OS

01/23/2014  08:41 AM    <DIR>          .
01/23/2014  08:41 AM    <DIR>          ..
01/22/2014  08:38 PM            40,364 anos1 – Copy (2).asm
01/22/2014  05:35 AM            39,688 anos1 – Copy.asm
01/23/2014  09:18 AM            43,045 anos1.asm
01/22/2014  07:53 AM            46,755 anos1.lst
01/22/2014  08:18 AM             2,145 anos1a.asm
01/22/2014  08:19 AM             4,271 anos1a.lst
01/22/2014  09:50 AM               605 anos1b
01/22/2014  09:56 AM             2,090 anos1b.asm
01/22/2014  09:57 AM               592 anos1b.bin
01/22/2014  09:50 AM             4,041 anos1b.lst
01/17/2014  10:58 PM               203 babystep1.asm
01/16/2014  11:44 AM               512 babystep1.bin
01/18/2014  10:52 PM               264 babystep1a.asm
01/22/2014  08:47 PM               259 babystep1b.asm
01/22/2014  08:33 PM               217 babystep1c.asm
01/16/2014  11:54 PM               300 babystep2.asm
01/16/2014  11:58 PM               512 babystep2.bin
01/18/2014  12:16 AM               137 babystep3.asm
01/18/2014  01:10 AM               512 babystep3.bin
01/18/2014  12:11 AM             2,106 babystep4.asm
01/18/2014  01:10 AM               512 babystep4.bin
01/18/2014  01:20 AM             1,326 babystep5.asm
01/18/2014  02:26 PM             1,242 babystep7.asm
01/16/2014  08:53 PM             9,519 bcdeditsession0.txt
01/17/2014  01:12 AM             3,561 bcdeditsession1.txt
01/18/2014  01:18 AM             4,686 bcdeditsession12.txt
01/17/2014  01:17 AM             3,312 bcdeditsession2.txt
01/18/2014  01:30 AM             4,320 bcdeditsession3.txt
01/18/2014  11:34 PM             1,103 myos1.asm
01/22/2014  08:27 AM               294 objexe.asm
01/22/2014  08:28 AM             1,171 objexe.lst
01/22/2014  08:28 AM               186 objexe.obj
01/22/2014  08:31 AM               294 objexe1.asm
01/22/2014  08:29 AM             1,517 objexe1.lst
01/18/2014  02:39 PM             1,114 realmodegreeting.asm
01/16/2014  08:46 PM            28,672 savedbcd0.bcd
01/23/2014  12:04 AM               960 try1.asm
01/22/2014  11:48 PM             5,832 try1.lst
01/23/2014  12:07 AM               909 try1b.asm
01/23/2014  10:22 AM               512 try2
01/23/2014  11:25 PM            12,486 try2.asm
01/23/2014  10:22 AM            10,614 try2.lst
42 File(s)        282,760 bytes
2 Dir(s)  366,169,497,600 bytes free

C:\Users\LaptopUser\My Programs\My OS>nasm -f bin try2.asm -l try2.lst
try2.asm:71: warning: uninitialized space declared in .text section: zeroing

C:\Users\LaptopUser\My Programs\My OS>bcdedit

Windows Boot Manager
——————–
identifier              {bootmgr}
device                  partition=\Device\HarddiskVolume1
description             Windows Boot Manager
locale                  en-US
inherit                 {globalsettings}
extendedinput           Yes
default                 {current}
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
displayorder            {current}
{4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
toolsdisplayorder       {memdiag}
timeout                 30
customactions           0x10000ba000001
0x54000001
custom:54000001         {572bcd55-ffa7-11d9-aae0-0007e994107d}

Windows Boot Loader
——————-
identifier              {current}
device                  partition=C:
path                    \Windows\system32\winload.exe
description             Windows 7
locale                  en-US
inherit                 {bootloadersettings}
recoverysequence        {4e6f2a0c-368f-11e0-8c10-5cac4cbbf0bb}
recoveryenabled         Yes
osdevice                partition=C:
systemroot              \Windows
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
nx                      OptIn

Real-mode Boot Sector
———————
identifier              {4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\babystep4.bin
description             My OS
bootdebug               Yes

C:\Users\LaptopUser\My Programs\My OS>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users\LaptopUser\My Programs\My OS

01/23/2014  11:26 PM    <DIR>          .
01/23/2014  11:26 PM    <DIR>          ..
01/22/2014  08:38 PM            40,364 anos1 – Copy (2).asm
01/22/2014  05:35 AM            39,688 anos1 – Copy.asm
01/23/2014  09:18 AM            43,045 anos1.asm
01/22/2014  07:53 AM            46,755 anos1.lst
01/22/2014  08:18 AM             2,145 anos1a.asm
01/22/2014  08:19 AM             4,271 anos1a.lst
01/22/2014  09:50 AM               605 anos1b
01/22/2014  09:56 AM             2,090 anos1b.asm
01/22/2014  09:57 AM               592 anos1b.bin
01/22/2014  09:50 AM             4,041 anos1b.lst
01/17/2014  10:58 PM               203 babystep1.asm
01/16/2014  11:44 AM               512 babystep1.bin
01/18/2014  10:52 PM               264 babystep1a.asm
01/22/2014  08:47 PM               259 babystep1b.asm
01/22/2014  08:33 PM               217 babystep1c.asm
01/16/2014  11:54 PM               300 babystep2.asm
01/16/2014  11:58 PM               512 babystep2.bin
01/18/2014  12:16 AM               137 babystep3.asm
01/18/2014  01:10 AM               512 babystep3.bin
01/18/2014  12:11 AM             2,106 babystep4.asm
01/18/2014  01:10 AM               512 babystep4.bin
01/18/2014  01:20 AM             1,326 babystep5.asm
01/18/2014  02:26 PM             1,242 babystep7.asm
01/16/2014  08:53 PM             9,519 bcdeditsession0.txt
01/17/2014  01:12 AM             3,561 bcdeditsession1.txt
01/18/2014  01:18 AM             4,686 bcdeditsession12.txt
01/17/2014  01:17 AM             3,312 bcdeditsession2.txt
01/18/2014  01:30 AM             4,320 bcdeditsession3.txt
01/18/2014  11:34 PM             1,103 myos1.asm
01/22/2014  08:27 AM               294 objexe.asm
01/22/2014  08:28 AM             1,171 objexe.lst
01/22/2014  08:28 AM               186 objexe.obj
01/22/2014  08:31 AM               294 objexe1.asm
01/22/2014  08:29 AM             1,517 objexe1.lst
01/18/2014  02:39 PM             1,114 realmodegreeting.asm
01/16/2014  08:46 PM            28,672 savedbcd0.bcd
01/23/2014  12:04 AM               960 try1.asm
01/22/2014  11:48 PM             5,832 try1.lst
01/23/2014  12:07 AM               909 try1b.asm
01/23/2014  11:26 PM               512 try2
01/23/2014  11:25 PM            12,486 try2 – Copy.asm
01/23/2014  11:25 PM            12,486 try2.asm
01/23/2014  11:26 PM            19,476 try2.lst
43 File(s)        304,108 bytes
2 Dir(s)  366,169,387,008 bytes free

C:\Users\LaptopUser\My Programs\My OS>nasm -f bin try2.asm -o try2.bin
try2.asm:71: warning: uninitialized space declared in .text section: zeroing

C:\Users\LaptopUser\My Programs\My OS>bcdedit

Windows Boot Manager
——————–
identifier              {bootmgr}
device                  partition=\Device\HarddiskVolume1
description             Windows Boot Manager
locale                  en-US
inherit                 {globalsettings}
extendedinput           Yes
default                 {current}
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
displayorder            {current}
{4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
toolsdisplayorder       {memdiag}
timeout                 30
customactions           0x10000ba000001
0x54000001
custom:54000001         {572bcd55-ffa7-11d9-aae0-0007e994107d}

Windows Boot Loader
——————-
identifier              {current}
device                  partition=C:
path                    \Windows\system32\winload.exe
description             Windows 7
locale                  en-US
inherit                 {bootloadersettings}
recoverysequence        {4e6f2a0c-368f-11e0-8c10-5cac4cbbf0bb}
recoveryenabled         Yes
osdevice                partition=C:
systemroot              \Windows
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
nx                      OptIn

Real-mode Boot Sector
———————
identifier              {4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\babystep4.bin
description             My OS
bootdebug               Yes

C:\Users\LaptopUser\My Programs\My OS>dir
Volume in drive C is Windows7_OS
Volume Serial Number is 0C40-EF61

Directory of C:\Users\LaptopUser\My Programs\My OS

01/23/2014  11:27 PM    <DIR>          .
01/23/2014  11:27 PM    <DIR>          ..
01/22/2014  08:38 PM            40,364 anos1 – Copy (2).asm
01/22/2014  05:35 AM            39,688 anos1 – Copy.asm
01/23/2014  09:18 AM            43,045 anos1.asm
01/22/2014  07:53 AM            46,755 anos1.lst
01/22/2014  08:18 AM             2,145 anos1a.asm
01/22/2014  08:19 AM             4,271 anos1a.lst
01/22/2014  09:50 AM               605 anos1b
01/22/2014  09:56 AM             2,090 anos1b.asm
01/22/2014  09:57 AM               592 anos1b.bin
01/22/2014  09:50 AM             4,041 anos1b.lst
01/17/2014  10:58 PM               203 babystep1.asm
01/16/2014  11:44 AM               512 babystep1.bin
01/18/2014  10:52 PM               264 babystep1a.asm
01/22/2014  08:47 PM               259 babystep1b.asm
01/22/2014  08:33 PM               217 babystep1c.asm
01/16/2014  11:54 PM               300 babystep2.asm
01/16/2014  11:58 PM               512 babystep2.bin
01/18/2014  12:16 AM               137 babystep3.asm
01/18/2014  01:10 AM               512 babystep3.bin
01/18/2014  12:11 AM             2,106 babystep4.asm
01/18/2014  01:10 AM               512 babystep4.bin
01/18/2014  01:20 AM             1,326 babystep5.asm
01/18/2014  02:26 PM             1,242 babystep7.asm
01/16/2014  08:53 PM             9,519 bcdeditsession0.txt
01/17/2014  01:12 AM             3,561 bcdeditsession1.txt
01/18/2014  01:18 AM             4,686 bcdeditsession12.txt
01/17/2014  01:17 AM             3,312 bcdeditsession2.txt
01/18/2014  01:30 AM             4,320 bcdeditsession3.txt
01/18/2014  11:34 PM             1,103 myos1.asm
01/22/2014  08:27 AM               294 objexe.asm
01/22/2014  08:28 AM             1,171 objexe.lst
01/22/2014  08:28 AM               186 objexe.obj
01/22/2014  08:31 AM               294 objexe1.asm
01/22/2014  08:29 AM             1,517 objexe1.lst
01/18/2014  02:39 PM             1,114 realmodegreeting.asm
01/16/2014  08:46 PM            28,672 savedbcd0.bcd
01/23/2014  12:04 AM               960 try1.asm
01/22/2014  11:48 PM             5,832 try1.lst
01/23/2014  12:07 AM               909 try1b.asm
01/23/2014  11:26 PM               512 try2
01/23/2014  11:25 PM            12,486 try2 – Copy.asm
01/23/2014  11:25 PM            12,486 try2.asm
01/23/2014  11:27 PM               512 try2.bin
01/23/2014  11:26 PM            19,476 try2.lst
44 File(s)        304,620 bytes
2 Dir(s)  366,169,120,768 bytes free

C:\Users\LaptopUser\My Programs\My OS>bcdedit /export savedbcd1.bcd
The operation completed successfully.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /create /d “My OS1” /application bootsector
The entry {4e6f2a10-368f-11e0-8c10-5cac4cbbf0bb} was successfully created.

C:\Users\LaptopUser\My Programs\My OS>bcdedit

Windows Boot Manager
——————–
identifier              {bootmgr}
device                  partition=\Device\HarddiskVolume1
description             Windows Boot Manager
locale                  en-US
inherit                 {globalsettings}
extendedinput           Yes
default                 {current}
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
displayorder            {current}
{4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
toolsdisplayorder       {memdiag}
timeout                 30
customactions           0x10000ba000001
0x54000001
custom:54000001         {572bcd55-ffa7-11d9-aae0-0007e994107d}

Windows Boot Loader
——————-
identifier              {current}
device                  partition=C:
path                    \Windows\system32\winload.exe
description             Windows 7
locale                  en-US
inherit                 {bootloadersettings}
recoverysequence        {4e6f2a0c-368f-11e0-8c10-5cac4cbbf0bb}
recoveryenabled         Yes
osdevice                partition=C:
systemroot              \Windows
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
nx                      OptIn

Real-mode Boot Sector
———————
identifier              {4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\babystep4.bin
description             My OS
bootdebug               Yes

C:\Users\LaptopUser\My Programs\My OS>bcdedit /?

BCDEDIT – Boot Configuration Data Store Editor

The Bcdedit.exe command-line tool modifies the boot configuration data store.
The boot configuration data store contains boot configuration parameters and
controls how the operating system is booted. These parameters were previously
in the Boot.ini file (in BIOS-based operating systems) or in the nonvolatile
RAM entries (in Extensible Firmware Interface-based operating systems). You can
use Bcdedit.exe to add, delete, edit, and append entries in the boot
configuration data store.

For detailed command and option information, type bcdedit.exe /? <command>. For
example, to display detailed information about the /createstore command, type:

bcdedit.exe /? /createstore

For an alphabetical list of topics in this help file, run “bcdedit /? TOPICS”.

Commands that operate on a store
================================
/createstore    Creates a new and empty boot configuration data store.
/export         Exports the contents of the system store to a file. This file
can be used later to restore the state of the system store.
/import         Restores the state of the system store using a backup file
created with the /export command.
/sysstore       Sets the system store device (only affects EFI systems, does
not persist across reboots, and is only used in cases where
the system store device is ambiguous).

Commands that operate on entries in a store
===========================================
/copy           Makes copies of entries in the store.
/create         Creates new entries in the store.
/delete         Deletes entries from the store.
/mirror         Creates mirror of entries in the store.

Run bcdedit /? ID for information about identifiers used by these commands.

Commands that operate on entry options
======================================
/deletevalue    Deletes entry options from the store.
/set            Sets entry option values in the store.

Run bcdedit /? TYPES for a list of datatypes used by these commands.
Run bcdedit /? FORMATS for a list of valid data formats.

Commands that control output
============================
/enum           Lists entries in the store.
/v              Command-line option that displays entry identifiers in full,
rather than using names for well-known identifiers.
Use /v by itself as a command to display entry identifiers
in full for the ACTIVE type.

Running “bcdedit” by itself is equivalent to running “bcdedit /enum ACTIVE”.

Commands that control the boot manager
======================================
/bootsequence   Sets the one-time boot sequence for the boot manager.
/default        Sets the default entry that the boot manager will use.
/displayorder   Sets the order in which the boot manager displays the
multiboot menu.
/timeout        Sets the boot manager time-out value.
/toolsdisplayorder  Sets the order in which the boot manager displays
the tools menu.

Commands that control Emergency Management Services for a boot application
==========================================================================
/bootems        Enables or disables Emergency Management Services
for a boot application.
/ems            Enables or disables Emergency Management Services for an
operating system entry.
/emssettings    Sets the global Emergency Management Services parameters.

Command that control debugging
==============================
/bootdebug      Enables or disables boot debugging for a boot application.
/dbgsettings    Sets the global debugger parameters.
/debug          Enables or disables kernel debugging for an operating system
entry.
/hypervisorsettings  Sets the hypervisor parameters.
C:\Users\LaptopUser\My Programs\My OS>bcdedit /delete?
An unknown command was specified.
Run “bcdedit /?” for command line assistance.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /? delete

This command deletes an entry from the boot configuration data store.

bcdedit [/store <filename>] /delete <id> [/f] [/cleanup | /nocleanup]

<filename>      Specifies the store to be used. If this option is not
specified, the system store is used. For more information,
run “bcdedit /? store”.

<id>            Specifies the identifier of the boot entry that you want to
delete. For more information about identifiers,
run “bcdedit /? ID”.

/f              Deletes the specified entry. Without this option, Bcdedit
will not delete any entries that have a well-known
identifier.

/cleanup        Deletes the specified entry and removes the entry from the
display order. Any other references to the entry being
deleted will also be removed from the store.  When deleting
an OS loader entry, the associated resume from hibernation
entry is also deleted if it is not referenced by any other
OS loaders. This option is assumed unless /nocleanup is
specified.

/nocleanup      Deletes the specified entry without removing the entry from
the display order.

Examples:

The following command deletes the specified operating system entry from the
store and removes the entry from the display order:

bcdedit /delete {cbd971bf-b7b8-4885-951a-fa03044f5d71}

The following command deletes the specified operating system entry from the
store and removes the entry from the display order:

bcdedit /delete {cbd971bf-b7b8-4885-951a-fa03044f5d71} /cleanup

The following command deletes the specified operating system entry from the
store without removing the entry from the display order:

bcdedit /delete {cbd971bf-b7b8-4885-951a-fa03044f5d71} /nocleanup

The following command deletes the NTLDR based OS loader entry from the store:

bcdedit /delete {ntldr} /f
C:\Users\LaptopUser\My Programs\My OS>bcdedit /delete  {4e6f2a10-368f-11e0-8c10-5cac4cbbf0
bb}
The operation completed successfully.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /create /d “My OS1” /application bootsector
The entry {4e6f2a11-368f-11e0-8c10-5cac4cbbf0bb} was successfully created.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /set  {4e6f2a10-368f-11e0-8c10-5cac4cbbf0bb}
device “partition=C:”
An error occurred while attempting to reference the specified entry.
The system cannot find the file specified.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /set  {4e6f2a11-368f-11e0-8c10-5cac4cbbf0bb}
device “partition=C:”
The operation completed successfully.

C:\Users\LaptopUser\My Programs\My OS>bcdedit /set  {4e6f2a11-368f-11e0-8c10-5cac4cbbf0bb}
path “\Users\LaptopUser\My Programs\My OS\try2.bin”
The operation completed successfully.

C:\Users\LaptopUser\My Programs\My OS>bcdedit

Windows Boot Manager
——————–
identifier              {bootmgr}
device                  partition=\Device\HarddiskVolume1
description             Windows Boot Manager
locale                  en-US
inherit                 {globalsettings}
extendedinput           Yes
default                 {current}
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
displayorder            {current}
{4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
toolsdisplayorder       {memdiag}
timeout                 30
customactions           0x10000ba000001
0x54000001
custom:54000001         {572bcd55-ffa7-11d9-aae0-0007e994107d}

Windows Boot Loader
——————-
identifier              {current}
device                  partition=C:
path                    \Windows\system32\winload.exe
description             Windows 7
locale                  en-US
inherit                 {bootloadersettings}
recoverysequence        {4e6f2a0c-368f-11e0-8c10-5cac4cbbf0bb}
recoveryenabled         Yes
osdevice                partition=C:
systemroot              \Windows
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
nx                      OptIn

Real-mode Boot Sector
———————
identifier              {4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\babystep4.bin
description             My OS
bootdebug               Yes

C:\Users\LaptopUser\My Programs\My OS>bcdedit /displayorder  {4e6f2a11-368f-11e0-8c10-5cac
4cbbf0bb} /addlast
The operation completed successfully.

C:\Users\LaptopUser\My Programs\My OS>bcdedit

Windows Boot Manager
——————–
identifier              {bootmgr}
device                  partition=\Device\HarddiskVolume1
description             Windows Boot Manager
locale                  en-US
inherit                 {globalsettings}
extendedinput           Yes
default                 {current}
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
displayorder            {current}
{4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
{4e6f2a11-368f-11e0-8c10-5cac4cbbf0bb}
toolsdisplayorder       {memdiag}
timeout                 30
customactions           0x10000ba000001
0x54000001
custom:54000001         {572bcd55-ffa7-11d9-aae0-0007e994107d}

Windows Boot Loader
——————-
identifier              {current}
device                  partition=C:
path                    \Windows\system32\winload.exe
description             Windows 7
locale                  en-US
inherit                 {bootloadersettings}
recoverysequence        {4e6f2a0c-368f-11e0-8c10-5cac4cbbf0bb}
recoveryenabled         Yes
osdevice                partition=C:
systemroot              \Windows
resumeobject            {7ec454e3-fe26-11df-a0f7-f0def12dfe29}
nx                      OptIn

Real-mode Boot Sector
———————
identifier              {4e6f2a0f-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\babystep4.bin
description             My OS
bootdebug               Yes

Real-mode Boot Sector
———————
identifier              {4e6f2a11-368f-11e0-8c10-5cac4cbbf0bb}
device                  partition=C:
path                    \Users\LaptopUser\My Programs\My OS\try2.bin
description             My OS1

C:\Users\LaptopUser\My Programs\My OS>

; boot.asm
; bin version

[BITS 16]

; from the Programmer’s Reference Manual
;The segment containing the currently executing sequence of instructions is known as the current code segment;
;it is specified by means of the CS register. The 80386 fetches all instructions from this code segment, using
;as an offset the contents of the instruction pointer. CS is changed implicitly as the result of intersegment
;control-transfer instructions (for example, CALL and JMP), interrupts, and exceptions.
;The instruction pointer register (EIP) contains the offset address, relative to the start of the current code
;segment, of the next sequential instruction to be executed. The instruction pointer is not directly visible
;to the programmer; it is controlled implicitly by control-transfer instructions, interrupts, and exceptions.
;As Figure 2-9 shows, the low-order 16 bits of EIP is named IP and can be used by the processor as a unit.
;This feature is useful when executing instructions designed for the 8086 and 80286 processors.
; from http://www.supernovah.com/Tutorials/BootSector2.php
;As stated earlier, we cannot be sure if the BIOS set us up with the starting address of 0x7C0:0x0 or 0x0:0x7C00.
;We will use the second segment offset pair to execute our boot sector so we know for sure how the CPU will access
;our code. To do this, our very first instruction will be a far jump that simply jumps to the next instruction.
;The trick is, if we specify a segment, even if it is 0x0, the jmp will be a far jump and the CS register will be
;loaded with the value 0x0 and the IP register will be loaded with the address of the next instruction to be
;executed.
;[BITS 16]
;[ORG 0x7C00]
;jmp 0x0:Start
;Start:
; This code will set the CS segment to 0x0, set the IP register to the the very next instruction which will be slightly past 0x7C00, ….

; universal-loop
;     {
;       start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // in “gia ba?o”, “ba?o” ~ maintain as in “ba?o thu?/to^`n” …
; try/if   ;// tin messages …. the try/if is the “gia” of “gia ba?o” …
;  maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i va` messageA va` messageB va` messageNEW va` tinLA`NH va`… ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // the message “stack” is loaded or push-pop with messages …; // push-and-pop-or-sent-and-receive (&messageNEW-hay-tinLA`NH); // tin and shakespeare’s version of “all roads lead to rome”: “doubt thou the stars are fire doubt truth to be a liar but never doubt I loved ‘muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well'”:  1/19/2014 Sunday Service … Gospel ~ Good News Tin La\nh …”Gia Ba?o”:  the “gia” attempts to reach an agreement with the “ba?o” …// salinger on internet news: push/pop/create stack/heap by an expansion assignment (“muo^n loa`i” <= “muo^n loa`i va` messageA va` messageB va` messageC va` ….”)
; ;catch/else  ;// unmaintainable tin/messages or kho’ tin hay kho^ng tin no messages … SBTN Uye^n Thi. commercial for MBR [master boot record] “kho’ tin nhu+ng co’ tha^.t …”
; ; go-to-jump-tro+?-ve^` start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”);
; go-to-jump-tro+?-ve^` start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~-ba?o-to^`n (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”);
;     }

; from http://wiki.osdev.org/Babystep2:
;some say that the bootloader is is loaded at 0000:7C00, while others say 07C0:0000.
;This is in fact the same address: 16 * 0x0000 + 0x7C00 = 16 * 0x07C0 + 0x0000 = 0x7C00.
%define MEMORYSEGMENTREALLOWBOUND 0x7C00
%define SEGMENTSIZE   512
%define MEMORYSEGMENTREALUPPERBOUND MEMORYSEGMENTREALLOWBOUND + MEMORYSEGMENTREALUPPERBOUND

%define ORIGIN 1
%ifdef ORIGIN
[ORG 0x7c00]
; segment:offset … ds:offset or cs:offset … 0:offset-from-0x7COO … that is, labels in code following is addressed as 0:0x7C00+offset-from-start-of-file

;Following code will set the CS segment to 0x0, set the IP register to the the very next instruction which will be slightly past 0x7C00, ….
jmp 0x0:start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction
; jmp start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction

%else
[ORG 0]
; segment:offset … ds:offset or cs:offset …  0x07C0:offset-from-0 … that is, labels in the code following is addressed as 0x07C0:0+offset-from-start-of-file

;Following code will set the CS segment to 0x07C0, set the IP register to the the very next instruction which will be slightly past 0x0, ….
jmp 0x07C0:start ; set up the ip stack pointer and cs segment register implicitly via jmp instruction
; jmp start  ; set up the ip stack pointer and cs segment register implicitly via jmp instruction

%endif

; data segment
datasegment   dw      123

; stack segment
stacksegment  resb 64
stacktop:

; set up the data, stack, etc. segment registers
start:
;mov    ax,seg DATASEGMENT1
;mov ax, 0x0
mov ax, datasegment
mov     ds,ax
;mov    ax,seg STACKSEGMENT
mov ax, stacksegment
mov     ss,ax
mov     sp,stacktop

; from http://wiki.osdev.org/Babystep2:
; In real mode, addresses are calculated as segment * 16 + offset. Since offset can be much larger than 16, there are many pairs
; of segment and offset that point to the same address.
%define REALADDRESS(SEGMENTNO,OFFSETNO) SEGMENTNO*16+OFFSETNO

%define VERIFYSEGMENTADDRESSBOUND(SEGMENTADDRESSTOVERIFY, OFFSETADDRESSTOVERIFY) \
(REALADDRESS(SEGMENTADDRESSTOVERIFY,OFFSETADDRESSTOVERIFY) > MEMORYSEGMENTREALLOWBOUND) \
& (REALADDRESS(SEGMENTADDRESSTOVERIFY,OFFSETADDRESSTOVERIFY) < MEMORYSEGMENTREALUPPERBOUND)
; generate some virtual segment:offset address for use with a real address …
; %define GENERATESEGMENTADDRESS(REALADDRESSNO, &GENSEGMENTNO, &GENOFFSETNO) …………….
; %define GENERATEVIRTUALSEGMENTADDRESS(REALADDRESSNO, VIRTUALOFFSETADDRESSINPUT) (REALADDRESSNO – VIRTUALOFFSETADDRESSINPUT)/16
; %define GENERATEOFFSETNO(REALADDRESSNO, VIRTUALSEGMENTADDRESSINPUT) (REALADDRESSNO – VIRTUALSEGMENTADDRESSINPUT * 16)

; from http://geezer.osdevbrasil.net/johnfine/segments.htm:
;The way it really works
; Each segment register is really four registers: •A selector register
;•A base register
;•A limit register
;•An attribute register
;
;In all modes, every access to memory that uses a segment register uses the base, limit, and attribute portions of the segment register and does not use the selector portion.
;Every direct access to a segment register (PUSHing it on the stack, MOVing it to a general register etc.) uses only the selector portion. The base, limit, and attribute portions are either very hard or impossible to read (depending on CPU type). They are often called the “hidden” part of the segment register because they are so hard to read.
;Intel documentation refers to the hidden part of the segment register as a “descriptor cache”. This name obscures the actual behavior of the “hidden” part.
; In real mode (or V86 mode), when you write any 16-bit value to a segment register, the value you write goes into the selector and 16 times that value goes into the base. The limit and attribute are not changed.
;In pmode, any write to a segment register causes a descriptor to be fetched from the GDT or LDT and unpacked into the base, limit and attribute portion of the segment register. (Special exception for the NULL Selector).
;When the CPU switchs between real mode and pmode, the segment registers do not automatically change. The selectors still contain the exact bit pattern that was loaded into them in the previous mode. The hidden parts still contain the values they contained before, so the segment registers can still be used to access whatever segments they refered to before the switch.

;Writes to a segment register
;When I refer to “writing to a segment register”, I mean any action that puts a 16-bit value into a segment register.
;The obvious example is something like:
;  MOV  DS,AX
;However the same rules apply to many other situations, including: •POP to a segment register.
;•FAR JMP or CALL puts a value in CS.
;•IRET or FAR RET puts a value in CS.
;•Both hardware and software interrupts put a value in CS.
;•A ring transition puts a value in both SS and CS.
;•A task switch loads all the segment registers from a TSS.

; from the Programmer’s Reference Manual
;The segment containing the currently executing sequence of instructions is known as the current code segment;
;it is specified by means of the CS register. The 80386 fetches all instructions from this code segment, using
;as an offset the contents of the instruction pointer. CS is changed implicitly as the result of intersegment
;control-transfer instructions (for example, CALL and JMP), interrupts, and exceptions.

; from http://www.supernovah.com/Tutorials/BootSector4.php:
;Video Memory
;As previously stated, what is printed to the screen is simply controlled by a special section of memory called
;the video memory (or VGA memory). This section of memory is then periodically copied to the video device
;memory which is then presented to the screen by the Digital Analog Converter (DAC). Currently we are in text
;mode 03h which is a form of EGA. The video memory for text mode 3h begins at 0xB8000. Text mode 03h is 80 characters wide
;and 25 characters tall. This gives us 2000 total characters (80 * 25). Each character consists of 2 bytes which
;yields 4000 bytes of memory in total. So this means that text mode 03h stores it’s video information (the information that is
;printed to the screen) at the memory address 0xB8000 and it takes up 4000 bytes of memory.
;Printing Character to the Screen
;The first we must do in order to print character to the screen is to get a segment register setup that points
;to the memory location 0xB8000 [= 753664 = 47104 * 16]. Remember that segments in real mode have the lower four bits implicitly
;set to zero and because each hex digit represents four bits we can easily drop the right most zero on the
;memory address when storing it in a segment register. We will use the ES segment register because we
;still want to access our data with the DS segment so we don’t run into problems when using instructions that
;implicitly use the DS segment by default.
;mov AX,0xB800 ;// = 47104
;mov ES,AX

;screen output …
;for the screen, the messages in (“muo^n loa`i” <= “muo^n loa`i va` messageA va` messageB va` messageC va` ….”) are pixels …
;(“muo^n loa`i va` pixel1 va` pixel2 va` … ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”)
screen:
.setupvideosegment:
mov AX,0xB800 ;// = 47104
mov ES,AX

;Clearing the Background
;Clearing the background is rather trivial. The goal is to set all of the attribute bytes to the background color
;you wish to clear it to. The basic idea is to create a loop that will set every other byte, starting at the first
;attribute byte, to the background color we wish to clear to. We must also be sure to only clear all of the attributes that
;are used to represent the string. In other words, be sure not to go past the last attribute byte. The last attribute byte is
;found at 80 * 25 * 2 – 1. The 80 is the width and the 25 is the height. The 2 is there because two bytes make up each
;character; one for the character and one for the attribute. Finally the 1 is subtracted because our first attribute byte is
;actually the second byte at the beginning The 1 simply takes into account that we start our count at one instead of zero.

.clearscreenpixels:
mov CX,80 * 25 * 2 – 1
mov BX,1
Loopthroughscreenpixels:
cmp BX,CX
ja finishclearscreenpixels
mov byte [ES:BX],10h ;Set background to blue
;and the text to black
;with no flashing text
add BX,2
jmp Loopthroughscreenpixels
finishclearscreenpixels:
;jmp exit

.sayhello:
mov byte [ES:0],’H’
mov byte [ES:2],’o’
mov byte [ES:4],’p’
mov byte [ES:6],’e’
mov byte [ES:8],’ ‘
mov byte [ES:10],’W’
mov byte [ES:12],’e’
mov byte [ES:14],’l’
mov byte [ES:16],’l’
;jmp exit
exit:

hang:
jmp hang ; or, equivalently in nasm: jmp $

times 510-($-$$) db 0 ; 2 bytes less now; $ = beginning of current line/expression = “times”, $$ = beginning of current section = “hang:”
db 0x55
db 0xAA

[ORG 0x7c00] ; and it goes on from here for 512 bytes, the so called “bootsector” of the memory map.
; “… It doesn’t matter if you use 0000:7c00 or 07c0:0000, ….”:
; from http://www.brokenthorn.com/Resources/OSDev4.html …
; because “Technically, there is exactly 4,096 different combinations of segment:offset that can refer to the same byte in memory — This is for each byte in memory! ”
; that the segment:
; 1/23/2014 degeneracy of address means cpu deals mostly with metaphors for addresses resolving [pm qm and relativity: india indian guy resembling albert einstein welcoming his wife
; from the hospital back home] to real address only when it is called for … gia ba?o shut room door and said bad words … prof mike longo …
; using metaphorical addresses is connected to how the equal sign becomes not the equal sign but becomes an assignment operator
; e.g. “muo^n loa`i” <= “muo^n loa`i va` messageA va` messageB va` messageC va` ….”
; gia ba?O “ba?o to^`n chi’nh nghi~a” [in a world where no one is outside of “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”,
; each and everything meaning resolves to “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”]
; offset form is “degenerate” is suggestive of how the origin or ORG is also “degenerate” in the following picture of two circles
; enclosing one another meeting at a common point, the origin:
;                      __
;                     /  \
;                     \()/
; from http://www.numberplanet.com/number/07c0/index.html: The Number 1984 (hex 0x07C0)
; from http://www.numberplanet.com/number/7c00/index.html: The Number 31744 (hex 0x7C00)
; pi = 3.14159265359
; 3:25 AM 1/22/2014 nurse at Women’s Health “…if you’re going to San Francisco, remember to wear some flower on your hair …”
; This is where BIOS loads the bootloader in a typical memory map for a typical pc board
; it is a word, or rather a number, play on the circle and on the British socialist-communist George Orwell
; from http://www.glamenv-septzen.net/en/view/6:
;”0x7C00″ was decided by IBM PC 5150 BIOS developer team (Dr. David Bradley).
; As mentioned above, this magic number was born at 1981 and “IBM PC/AT Compat” PC/BIOS
; vendors did not change this value for BIOS and OS’s backward compatibility.
; nothing-kho^ng … 7C0: ba^?y co’/co^? …; C00 ~ sound of a dove or–father and
; pak-ming ho koo stark poster– “CU” ~ “bird” ~ “sex” 00 ~ oolitic ~ egg c ~ sea 0x7c00 ~ seven seas “travel the world and the seven seas ….”
; [the “well” in “Orwell”: “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”:
; nguye^n thu?y origin is “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”]
; Perpetual Motion or “forever young” or hoa`i hoa`i ma~i ma~i vi~nh vie^~n “muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”
; jmp $  ;
; or this version
;hang: jmp hang
; the universal programming loop …. in pseudo-code …
; Gia Ba?o is struggling with his two selves “Gia” ~ “wall” ~ “if (maintainable) …” and “Ba?o” ~ “bao” ~ “tolerate” ~ expansion of what’s maintainable to
; ever larger inclusions …
;     {
;       start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~ (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // in “gia ba?o”, “ba?o” ~ maintain as in “ba?o thu?” …
; push-and-pop-or-sent-and-receive (&messageNEW-hay-tinLA`NH); // tin and shakespeare’s version of “all roads lead to rome”: “doubt thou the stars are fire doubt truth to be a liar but never doubt I loved ‘muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well'”:  1/19/2014 Sunday Service … Gospel ~ Good News Tin La\nh …”Gia Ba?o”:  the “gia” attempts to reach an agreement with the “ba?o” …
; if (maintainable-giu+~-ddu+o+.c) maintain-thi`-giu+~ (“muo^n loa`i va` messageA va` messageB va` messageNEW va` tinLA`NH va`… ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”); // the message “stack” is loaded or push-pop with messages …
; go-to-jump-tro+?-ve^` start-ORG-nguye^n-thu?y: maintain-gi`n-giu+~ (“muo^n loa`i ddu+o+.c so^’ng la^u bi`nh thu+o+`ng; everyone live long and well”);
;     }
;
; from http://forum.osdev.org/viewtopic.php?f=1&t=20933
; The BIOS loads the boot block at physical address 07C00H but there is no guarantee that it is logical address 0000:7C00H or 07C0:0000H.
; To set all segment registers to 0, this should do:
;[org 7C00H]
;    jmp 0:start
;    nop
;//global start
;start:
;    xor ax, ax
;    mov ds, ax
;    mov es, ax
;    mov ss, ax
;    mov sp, …
; I prefer this because it gives you direct [segment:offset 0:offset] access to the Interrupt Vector Table and the BIOS Data Area.
; in fact, this is not only a software problem: hardware-wise voltages that claims to be “digital” with sharp boundaries/transitions
;are supposed to be impresed upon the pins of a cpu [when the ocean waves hit a boat, the boat has no choice/computation but to
; respond by bobbing to the waves: tri ha`nh ho+.p nha^’t:  gia ba?o “pho^’i ho+.p” “sie^u nha^n” … ] can be more similar to
;analog voltages–To^n DDi.nh asked about common mode rejection ratio in layman terms balanced or unbalanced audio cables for the speakers he
;just bought that just arrived–and these analog voltages take a finite amount of time to stabilized to digital form
; from http://geezer.osdevbrasil.net/johnfine/segments.htm:
;WARNING: A 386 needs a very tiny delay (any instruction would be more than enough) after switching to pmode, before it can correctly load a selector
;into a segment register. In one version of my switch to flat real mode I had the selector value in a general register before switching to pmode, and
;the very first instruction after switching to pmode was a fast instruction to MOV that selector to a segment register. Depending on instruction alignment,
;it could corrupt the hidden part of the segment register (on a 386 only). You can safely write to a segment register with the very first instruction after
;switching to pmode if it is a slow instruction like a POP or a far JMP, but not if it is a fast instruction like “MOV DS,BX”. Normally you wouldn’t even
;notice this problem because it is more natural to move the selector to a register right before you move it to the segment register.

;from http://www.supernovah.com/Tutorials/BootSector2.php:
;Setting up CS and IP
;As stated earlier, we cannot be sure if the BIOS set us up with the starting address of 0x7C0:0x0 or 0x0:0x7C00.
;We will use the second segment offset pair to execute our boot sector so we know for sure how the CPU will access
;our code. To do this, our very first instruction will be a far jump that simply jumps to the next instruction.
;The trick is, if we specify a segment, even if it is 0x0, the jmp will be a far jump and the CS register will be
;loaded with the value 0x0 and the IP register will be loaded with the address of the next instruction to be executed.
; jmp 0x0:Start
;This code will set the CS segment to 0x0, set the IP register to the the very next instruction which will be slightly past 0x7C00, to label “Start:”

; from http://faydoc.tripod.com/cpu/jmp.htm
;Description
; Transfers program control to a different point in the instruction stream without recording return information. The destination (target) operand specifies the address of the instruction being jumped to. This operand can be an immediate value, a general-purpose register, or a memory location.
;
; This instruction can be used to execute four different types of jumps:
; Near jump A jump to an instruction within the current code segment (the segment currently pointed to by the CS register), sometimes referred to as an intrasegment jump.
; Short jump A near jump where the jump range is limited to –128 to +127 from the current EIP value.
; Far jump A jump to an instruction located in a different segment than the current code segment but at the same privilege level, sometimes referred to as an intersegment jump.
; Task switch A jump to an instruction located in a different task.
;
;A task switch can only be executed in protected mode (see Chapter 6, Task Management, in the Intel Architecture Software Developer’s Manual, Volume 3, for information on performing task switches with the JMP instruction).
;
;Near and Short Jumps.  When executing a near jump, the processor jumps to the address (within the current code segment) that is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the EIP register). A near jump to a relative offset of 8-bits (rel8) is referred to as a short jump. The CS register is not changed on near and short jumps.
;
; An absolute offset is specified indirectly in a general-purpose register or a memory location (r/m16 or r/m32). The operand-size attribute determines the size of the target operand (16 or 32 bits). Absolute offsets are loaded directly into the EIP register. If the operand-size attribute is 16, the upper two bytes of the EIP register are cleared to 0s, resulting in a maximum instruction pointer size of 16 bits.
;
; A relative offset (rel8, rel 16, or rel32) is generally specified as a label in assembly code, but at the machine code level, it is encoded as a signed 8-, 16-, or 32-bit immediate value. This value is added to the value in the EIP register. (Here, the EIP register contains the address of the instruction following the JMP instruction). When using relative offsets, the opcode (for short vs. near jumps) and the operand-size attribute (for near relative jumps) determines the size of the target operand (8, 16, or 32 bits).
;
;Far Jumps in Real-Address or Virtual-8086 Mode. When executing a far jump in real-address or virtual-8086 mode, the processor jumps to the code segment and offset specified with the target operand. Here the target operand specifies an absolute far address either directly with a pointer (ptr16:16 or ptr16:32) or indirectly with a memory location (m16:16 or m16:32). With the pointer method, the segment and address of the called procedure is encoded in the instruction, using a 4-byte (16-bit operand size) or 6-byte (32-bit operand size) far address immediate. With the indirect method, the target operand specifies a memory location that contains a 4-byte (16-bit operand size) or 6-byte (32-bit operand size) far address. The far address is loaded directly into the CS and EIP registers. If the operand-size attribute is 16, the upper two bytes of the EIP register are cleared to 0s.

; from http://glob.inamidst.com/bootloader:
;So I guess that jmp far 0:0x7C00 works. Maybe. Though then that is probably going to reach the jmp instruction again, so that’ll just loop. You can’t set CS and EIP directly, hence the jump. Perhaps you can also do something like this:
;org 0x7C00
;jmp far 0:start
;start:
;    …

; from http://gaztek.sourceforge.net/osdev/boot/gbootsect.txt:
;Creating your own bootsector is simpler than you may think,
;the only requirement is that the bootsector is 512 bytes long, and at
;offset 0x1FE (decimal=510), the word 0xAA55 is placed. This is the first
;thing the BIOS does when the PC boots up, it first looks on the first
;floppy drive at the first sector for 0xAA55 at the end, and if it finds it
;then it loads it into memory, and starts executing it, otherwise it trys the
;primary harddisk, and if that isn’t found it just bombs out with an error.
;You should place your boot sector at:
;  Sector 1
;  Cylinder 0
;  Head 0
;The BIOS loads the bootsector at linear offset 0x7C00, the state of
;the registers are:
;
; DL = Boot drive, 1h = floppy1, 80h = primary harddisk, etc
; CS = 0
; IP = 0x7c00

; from http://webcache.googleusercontent.com/search?q=cache:F-Lp9kDLukcJ:www.cs.cmu.edu/~410/lectures/L20_Bootstrap.pdf+&cd=25&hl=en&ct=clnk&gl=us:
;Ground Zero
;You turn on the machine
;Execution begins in real mode at a specific memory address
;Real mode – primeval x86 addressing mode
;Only 1 MB of memory is addressable
;First instruction fetch address is 0xFFFF0 (???)
;“End of memory” (20-bit infinity), minus 15…
;Contains a jump to the actual BIOS entry point
;Great, what’s a BIOS?

; a code segment
[SEGMENT CODESEGMENT1 PROGBITS ALIGN=16]  [BITS 16]  ; SECTION .text USE16 … [] is “primitive form”, BITS 16 is “user-level form”, “.text” is a standard well-known name version of “CODESEGMENT1”

start:
;mov     ax,seg DATASEGMENT1
mov ax, 0x0
mov     ds,ax
mov     ax,seg STACKSEGMENT
mov     ss,ax
mov     sp,stacktop

; another code segment
[SEGMENT CODESEGMENT2 PROGBITS FOLLOWS=CODESEGMENT1 ALIGN=16]  [BITS 16]  ; SECTION .text USE16 … [] is “primitive form”, BITS 16 is “user-level form”
; chay tron tinh yeu movie “kho^ng nghe chu’ khuye^n nu+~a dda^u”
; and another code segment
[SEGMENT CODESEGMENT3 PROGBITS FOLLOWS=CODESEGMENT2 ALIGN=16]  [BITS 16]  ; SECTION .text USE16 … [] is “primitive form”, BITS 16 is “user-level form”

; a stack segment
[SEGMENT STACKSEGMENT  PROGBITS FOLLOWS=CODESEGMENT3 ALIGN=16]  [BITS 16]  ; SECTION .data USE16 … [] is “primitive form”, BITS 16 is “user-level form”
; resb 64  ; resb = reserve-byte, length of stack is 64 bytes
;stacktop:
; from http://www.osdever.net/bkerndev/Docs/basickernel.htm
; Remember that a stack actually grows downwards, so we declare the size of the data before declaring the label “stacktop:”

; a data segment
[SEGMENT DATASEGMENT1 PROGBITS FOLLOWS=STACKSEGMENT ALIGN=4]  [BITS 16]  ; SECTION .data USE16 … [] is “primitive form”, BITS 16 is “user-level form”
db    ‘hello’,13,10,’$’   ; so are string constants

; another data segment
[SEGMENT DATASEGMENT2 PROGBITS FOLLOWS=DATASEGMENT1 ALIGN=4]  [BITS 16]  ; SECTION .data USE16 … [] is “primitive form”, BITS 16 is “user-level form”
db    0x55,0x56,0x57      ; three bytes in succession

; be sure that all the segments above do not add up in size to more than 512 bytes …
times 512 – 2 -($-$$) db 0 ; Pad remainder of 512-bytes “boot sector” with zero’s …
dw 0xAA55          ; and The standard PC boot signature
; ye^’n  mentioned $ 500 day earning …
[SEGMENT CODESEGMENT1]
end:
times 512 – 2 -($-$$) db 0 ; Pad remainder of 512-bytes “boot sector” with zero’s …
dw 0xAA55          ; and The standard PC boot signature
; ye^’n  mentioned $ 500 day earning …

; what if one try :
;absolute  0x7C00 + 0x200 ; 0x200 is 512 bytes 0x1FE is 510
;
;    magic_chr    resw    1
; it’s only reserved memory no codes is generated by the assembler …
;***************************************************************************************************************************
;***** General NOTES *****
; from http://www.bioscentral.com/misc/biosbasics.htm:
; 1.  Power is applied to the computer
;
;   When power is applied to the system and all output voltages from the power supply are good, the power supply will generate a power good signal which is received by the motherboard timer.  When the timer receives this signal, it stops forcing a reset signal to the CPU and the CPU begins processing instructions.
;
;    2.  Actual boot
;
;    The very first instruction performed by a CPU is to read the contents of a specific memory address that is preprogrammed into the CPU.  In the case of x86 based processors, this address is FFFF:0000h.   This is the last 16 bytes of memory at the end of the first megabyte of memory.   The code that the processor reads is actually a jump command (JMP) telling the processor where to go in memory to read the BIOS ROM.  This process is traditionally referred to as the bootstrap, but now commonly referred to as boot and has been broadened to include the entire initialization process from applying power to the final stages of loading the operating system.
;
;   3.  POST
;
;    POST stands for Power On Self Test.  It’s a series of individual functions or routines that perform various initialization and tests of the computers hardware.  BIOS starts with a series of tests of the motherboard hardware.  The CPU, math coprocessor, timer IC’s, DMA controllers, and IRQ controllers. The order in which these tests are performed varies from mottherboard to motherboard. Next, the BIOS will look for the presence of video ROM between memory locations C000:000h and C780:000h.  If a video BIOS is found, It’s contents will be tested with a checksum test.  If this test is successful, the BIOS will initialize the video adapter. It will pass controller to the video BIOS, which will inturn initialize itself and then assume controller once it’s complete.  At this point, you should see things like a manufacturers logo from the video card manufacturer video card description or the video card BIOS information.  Next, the BIOS will scan memory from C800:000h to DF800:000h in 2KB increments.  It’s searc;hing for any other ROM’s that might be installed in the computer, such as network adapter cards or SCSI adapter cards. If a adapter ROM is found, it’s contents are tested with a checksum test.  If the tests pass, the card is initialized. Controller will be passed to each ROM for initialization then the system BIOS will resume controller after each BIOS found is done initializing. If these tests fail, you should see a error message displayed telling you “XXXX ROM Error”.  The XXXX indicates the segment address where the faulty ROM was detected.  Next, BIOS will begin checking memory at 0000:0472h.  This address contains a flag which will tell the BIOS if the system is booting from a cold boot or warm boot.  A value of 1234h at this address tells the BIOS that the system was started from a warm boot. This signature value appears in Intel little endian format , that is, the least significant byte comes first, they appear in memory as the sequence 3412. In the event of a warm boot, the BIOS will will skip the PO;ST routines remaining.  If a cold start is indicated, the remaining POST routines will be run.  During the POST test, a single hexadecimal code will be written to port 80h.  Some other PC’s send these codes to other ports however. Compaq sends them to port 84h, IBM PS/2 model 25 and 30 send them to port 90h, model 20-286 send them to port 190h. Some EISA machines with an Award BIOS send them to port 300h and system with the MCA architecture send them to port 680h. Some early AT&T, Olivetti, NCR and other AT Clones send them to the printer port at 3BC, 278h or 378h. This code will signify what is being tested at any given moment.   Typically, when the BIOS fails at some point, this code will tell you what is failing.
;
;   4.  Looking for the Operating System
;
;    Once POST is complete and no errors found, the BIOS will begin searching for an operating system.   Typically, the BIOS will look for a DOS Volume Boot Sector on the floppy drive.   If no operating system is found, it will search the next location, the hard drive C.  If the floppy drive (A), has a bootable floppy in it, the BIOS will load sector 1, head 0, cylinder 0 from the disk into memory starting at location 0000:7C00h.  The first program to load will be IO.SYS, then MSDOS.SYS.  If the floppy does not contain a DOS volume boot sector, then BIOS will next search the computers hard drive for a master partition boot sector and load it into memory at 0000:7C00h.  There are some occasions in which you will encounter problems with the proper loading of the Volume Boot Sector.  Below are some of those:
;
;            A.  If the first byte of the Volume Boot Sector is less than 6h, then you will receive a message similar to “Diskette boot record error”.
;
;            B.  If the IO.SYS or MSDOS.SYS are not the first two files in the Volume Boot Sector, then you will see a message similar to “Non-system disk or disk error”.
;
;            C.  If the Volume Boot Sector is corrupt or missing, you will get a message similar to “Disk boot failure”
;
;Once the BIOS has searched for a bootable floppy device, it should turn it’s attention to the next boot device it’s programmed to look for.  The next device is typically the hard drive, or C.   Like a floppy drive, the BIOS will attempt to load the Volume Boot Sector from sector 1, head 0, cylinder 0 from the Master Boot Sector, or MBS, into memory starting at 0000:7C00h.  The BIOS will check the last two bytes of the MBS.  They should be 55h and AAh respectively.  If they are not, then you will receive an error message similar to “No boot device available” and “System initialization will halt”.  If they are correct, then the BIOS will continue the loading process.   At this point, the BIOS will scan the MBR in search of any extended partitions.   If any extended partitions are identified, the original boot sector will search for a boot indicator byte which indicates a active and bootable partition.  If it cannot find one, you will receive a message similar to “Invalid partition table”.
;
;At this, once a active partition is found, the BIOS will search for a Volume Boot Sector on the bootable partition and load the VBS into memory and test it.  If the VBS is not readable or corrupt, you will see a message similar to “Error loading operating system”.  At the point, the BIOS will read the last two bytes of the VBS.  These bytes should be 55h and AAh respectively.  If they are not, then you will see a message similar to “Missing operating system”  It is at this point that the BIOS will begin loading of the operating system.

; from http://en.wikipedia.org/wiki/BIOS
;When the x86 processor is reset, it loads its program counter with a fixed address near the top of the 1 megabyte real-mode address space. The address of the BIOS’s memory is located such that it will be executed when the computer is first started up. A jump instruction then directs the processor to start executing code in the BIOS. If the system has just been powered up or the reset button was pressed (“cold boot”), the full power-on self-test (POST) is run. If Ctrl+Alt+Delete was initiated (“warm boot”), a special flag value is detected in Nonvolatile memory (NVRAM) and the BIOS does not run the POST. This saves the time otherwise used to detect and test all memory. The NVRAM is in the real-time clock (RTC).
;
;The power-on self-test tests, identifies, and initializes system devices such as the CPU, RAM, interrupt and DMA controllers and other parts of the chipset, video display card, keyboard, hard disk drive, optical disc drive and other basic hardware. The BIOS then locates boot loader software held on a storage device designated as a ‘boot device’, such as a hard disk, a floppy disk, CD, or DVD, and loads and executes that software, giving it control of the PC.[8] This process is known as booting, or booting up, which is short for “bootstrapping”.
;
;Boot devices[edit]
;
;The BIOS selects candidate boot devices using information collected by POST and configuration information from EEPROM, CMOS RAM or, in the earliest PCs, DIP switches. Option ROMs may also influence or supplant the boot process defined by the motherboard BIOS ROM. The BIOS checks each device in order to see if it is bootable. For a disk drive or a device that logically emulates a disk drive, such as an USB Flash drive or perhaps a tape drive, to perform this check the BIOS attempts to load the first sector (boot sector) from the disk to memory address 0x007C00, and checks for the boot sector signature 0x55 0xAA in the last two bytes of the (512 byte long) sector. If the sector cannot be read (due to a missing or blank disk, or due to a hardware failure), or if the sector does not end with the boot signature, the BIOS considers the disk unbootable and proceeds to check the next device. Another device such as a network adapter attempts booting by a procedure that is defined by its option ROM (or the equivalent ;integrated into the motherboard BIOS ROM). The BIOS proceeds to test each device sequentially until a bootable device is found, at which time the BIOS transfers control to the loaded sector with a jump instruction to its first byte at address 0x007C00 (1 KiB below the 32 KiB mark).

;from http://www.brokenthorn.com/Resources/OSDev7.html:
;General x86 Real Mode Memory Map: •0x00000000 – 0x000003FF – Real Mode Interrupt Vector Table
;•0x00000400 – 0x000004FF – BIOS Data Area
;•0x00000500 – 0x00007BFF – Unused
;•0x00007C00 – 0x00007DFF – Our Bootloader
;•0x00007E00 – 0x0009FFFF – Unused
;•0x000A0000 – 0x000BFFFF – Video RAM (VRAM) Memory
;•0x000B0000 – 0x000B7777 – Monochrome Video Memory
;•0x000B8000 – 0x000BFFFF – Color Video Memory
;•0x000C0000 – 0x000C7FFF – Video ROM BIOS
;•0x000C8000 – 0x000EFFFF – BIOS Shadow Area
;•0x000F0000 – 0x000FFFFF – System BIOS
;
;Note: It is possible to remap all of the above devices to use different regions of memory. This is what the BIOS POST does to map the devices to the table above.
;
;Okay, this is cool and all. Because these addresses represent different things, by reading (or writing) to specific addresses, we get obtain (or change) information with ease from different parts of the computer.
;***** NOTES *****

; from http://wiki.osdev.org/Babystep1:
; jmp $  ;
; or this version
;hang: jmp hang
; Near and Short Jumps.  When executing a near jump, the processor jumps to the address (within the current code segment) that
;is specified with the target operand. The target operand specifies either an absolute offset (that is an offset from the base of
;the code segment) or a relative offset (a signed displacement relative to the current value of the instruction pointer in the
;EIP register). A near jump to a relative offset of 8-bits (rel8) is referred to as a short jump. The CS register is not changed on
; near and short jumps.

; degeneracy of the segment:offset scheme of addressing means it’s a “metaphor”: the cpu interfaces with the “muo^n loa`i” expansion
; as a metaphor resolving it to a real physical address …

; from http://wiki.osdev.org/Babystep2:
; In real mode, addresses are calculated as segment * 16 + offset. Since offset can be much larger than 16, there are many pairs
; of segment and offset that point to the same address. For instance, some say that the bootloader is is loaded at 0000:7C00,
; while others say 07C0:0000. This is in fact the same address: 16 * 0x0000 + 0x7C00 = 16 * 0x07C0 + 0x0000 = 0x7C00.
; It doesn’t matter if you use 0000:7c00 or 07c0:0000, but if you use ORG you need to be aware of what’s happening. By default,
; the start of a raw binary is at offset 0, but if you need it you can change the offset to something different and make it work.
; For instance the following snippet accesses the variable msg with segment 0x7C0.
; segment:offset  ds:offset   0x07CO:offset-from-0
; ; boot.asm
; ; by default, [ORG 0]
;   mov ax, 0x07c0
;   mov ds, ax
; or the other version:
; segment:offset ds:offset 0:offset-from-0x7COO
; ; boot.asm
; ; [ORG 0x7c00]
;   xor ax, ax ; make it zero
;   mov ds, ax
; from http://geezer.osdevbrasil.net/johnfine/segments.htm : In real mode the CPU shifts the segment
; register value left by four places (multiplying it by 16) and adds the 16 bit offset to get a 20 bit physical address.
; Any physical address can be represented in multiple ways, with different segments and offsets. For
; example, physical address 0x210 can be 0020:0010, 0000:0210, or 0021:0000.
; thus,

; from NASM manual:
;The bin format provides an additional directive to the list given in chapter 6: ORG.
; The function of the ORG directive is to specify the origin address which NASM will assume the program begins at when it is loaded into memory.

;For example, the following code will generate the longword 0x00000104:
;
;        org     0x100
;        dd      label
;label:
; guesss statement “dd label” is not a “critical expression” and we can assume that on the first pass NASM does not know what
; the argument to “dd”, namely “label”, is to initialized “dd”, but on the second pass NASM would have figured that “label”
; is the address of “label:” which is double word distance from “org” or 4 bytes from “org” or 104 …

;ALIGN is used, as shown above, to specify how many low bits of the segment start address must be forced to zero [that is, “round off” or “modulo”].
;nasm default
;section .text    code  align=16
;section .data    data  align=4
;section .bss     bss   align=4

; from http://ece425web.groups.et.byu.net/stable/labs/NASM.html:
;The align directive allows programmers to align their code to word, dword, or larger boundaries in memory. To align to a word boundary, the following
;line of assembly could be used:
; align 2 ; Align to nearest 2-byte boundary
;This will cause an unused byte to be inserted if the address of the next instruction or data would have been odd. The parameter given to align must be a
;power of 2. Code and data alignment are important in ensuring memory performance.
; When linking several .OBJ files into a .EXE file, you should ensure that exactly one of them has a start point
; defined (using the ..start special symbol defined by the obj format: see section 6.2.6). If no module defines
; a start point, the linker will not know what value to give the entry-point field in the output file header; if
; more than one defines a start point, the linker will not know which value to use.

; OMF linkers require exactly one of the object files being linked to define the program entry point, where execution will begin when
; the program is run. If the object file that defines the entry point is assembled using NASM, you specify the entry point by declaring
; the special symbol ..start at the point where you wish execution to begin.
; An example of a NASM source file which can be assembled to a .OBJ file and linked on its own to a .EXE is given here.
; It demonstrates the basic principles of defining a stack, initialising the segment registers, and declaring a start point.
; This file is also provided in the test subdirectory of the NASM archives, under the name objexe.asm.
; This initial piece of code sets up DS to point to the data segment, and initialises SS and SP to point to the top of the
; provided stack. Notice that interrupts are implicitly disabled for one instruction after a move into SS, precisely for this
; situation, so that there’s no chance of an interrupt occurring between the loads of SS and SP and not having a stack to execute on.

;NASM contains no mechanism to support the various C memory models directly; you have to keep track yourself of which one you are writing for. This means you have to keep track of the following things:
;•In models using a single code segment (tiny, small and compact), functions are near. This means that function pointers, when stored in data segments or pushed on the stack as function arguments, are
;16 bits long and contain only an offset field (the CS register never changes its value, and always gives the segment part of the full function address), and that functions are called using ordinary near
;CALL instructions and return using RETN (which, in NASM, is synonymous with RET anyway). This means both that you should write your own routines to return with RETN, and that you should call external C
;routines with near CALL instructions.
;•In models using more than one code segment (medium, large and huge), functions are far. This means that function pointers are 32 bits long (consisting of a 16-bit offset followed by a 16-bit segment),
;and that functions are called using CALL FAR (or CALL seg:offset) and return using RETF. Again, you should therefore write your own routines to return with RETF and use CALL FAR to call external routines.
;•In models using a single data segment (tiny, small and medium), data pointers are 16 bits long, containing only an offset field (the DS register doesn’t change its value, and always gives the segment
;part of the full data item address).
;•In models using more than one data segment (compact, large and huge), data pointers are 32 bits long, consisting of a 16-bit offset followed by a 16-bit segment. You should still be careful not to modify
;DS in your routines without restoring it afterwards, but ES is free for you to use to access the contents of 32-bit data pointers you are passed.
;•The huge memory model allows single data items to exceed 64K in size. In all other memory models, you can access the whole of a data item just by doing arithmetic on the offset field of the pointer you
;are given, whether a segment field is present or not; in huge model, you have to be more careful of your pointer arithmetic.
;•In most memory models, there is a default data segment, whose segment address is kept in DS throughout the program. This data segment is typically the same segment as the stack, kept in SS, so that
;functions’ local variables (which are stored on the stack) and global data items can both be accessed easily without changing DS. Particularly large data items are typically stored in other segments. However,
;some memory models (though not the standard ones, usually) allow the assumption that SS and DS hold the same value to be removed. Be careful about functions’ local variables in this latter case.
;
;In models with a single code segment, the segment is called _TEXT, so your code segment must also go by this name in order to be linked into the same place as the main code segment. In models with a single
;data segment, or with a default data segment, it is called _DATA.

; the advantage of using the SEGMENT directive to “label” code:
; When you define a segment in an obj file, NASM defines the segment name as a symbol as well, so that you can access the segment
; address of the segment. So, for example:
;          segment data
;dvar:     dw 1234
;          segment code
;function: mov ax,data            ; get segment address of data
;          mov ds,ax              ; and move it into DS
;          inc word [dvar]        ; now this reference will work
; ith, bin, …: this is a flat memory image format with no support for relocation or linking.

;7.1.3 Multisection Support for the bin Format

;The bin format allows the use of multiple sections, of arbitrary names, besides the “known” .text, .data, and .bss names.
;•Sections may be designated progbits or nobits. Default is progbits (except .bss, which defaults to nobits, of course).
;•Sections can be aligned at a specified boundary following the previous section with align=, or at an arbitrary byte-granular position with start=.
;•Sections can be given a virtual start address, which will be used for the calculation of all memory references within that section with vstart=.
;•Sections can be ordered using follows=<section> or vfollows=<section> as an alternative to specifying an explicit start address.
;•Arguments to org, start, vstart, and align= are critical expressions. See section 3.8. E.g. align=(1 << ALIGN_SHIFT) – ALIGN_SHIFT must be defined before it is used here.
;•Any code which comes before an explicit SECTION directive is directed by default into the .text section.
;•If an ORG statement is not given, ORG 0 is used by default.
;•The .bss section will be placed after the last progbits section, unless start=, vstart=, follows=, or vfollows= has been specified.
;•All sections are aligned on dword boundaries, unless a different alignment has been specified.
;•Sections may not overlap.
;•NASM creates the section.<secname>.start for each section, which may be used in your code.
;7.4.1 obj Extensions to the SEGMENT Directive
;
;The obj output format extends the SEGMENT (or SECTION) directive to allow you to specify various properties of the segment you are defining. This is done by appending extra qualifiers to the end of the segment-definition line. For example,
;
;segment code private align=16
;
;
;defines the segment code, but also declares it to be a private segment, and requires that the portion of it described in this code module must be aligned on a 16-byte boundary.
;
;The available qualifiers are:
;•PRIVATE, PUBLIC, COMMON and STACK specify the combination characteristics of the segment. PRIVATE segments do not get combined with any others by the linker; PUBLIC and STACK segments get concatenated together at link time; and COMMON segments all get overlaid on top of each other rather than stuck end-to-end.
;•ALIGN is used, as shown above, to specify how many low bits of the segment start address must be forced to zero. The alignment value given may be any power of two from 1 to 4096; in reality, the only values supported are 1, 2, 4, 16, 256 and 4096, so if 8 is specified it will be rounded up to 16, and 32, 64 and 128 will all be rounded up to 256, and so on. Note that alignment to 4096-byte boundaries is a PharLap extension to the format and may not be supported by all linkers.
;•CLASS can be used to specify the segment class; this feature indicates to the linker that segments of the same class should be placed near each other in the output file. The class name can be any word, e.g..
;•OVERLAY, like CLASS, is specified with an arbitrary word as an argument, and provides overlay information to an overlay-capable linker.
;•Segments can be declared as USE16 or USE32, which has the effect of recording the choice in the object file and also ensuring that NASM’s default assembly mode when assembling in that segment is 16-bit or 32-bit respectively.
;•When writing OS/2 object files, you should declare 32-bit segments as FLAT, which causes the default segment base for anything in the segment to be the special group FLAT, and also defines the group if it is not already defined.
;•The obj file format also allows segments to be declared as having a pre-defined absolute segment address, although no linkers are currently known to make sensible use of this feature; nevertheless, NASM allows you to declare a segment such as SEGMENT SCREEN ABSOLUTE=0xB800 if you need to. The ABSOLUTE and ALIGN keywords are mutually exclusive. ;
;
;NASM’s default segment attributes are PUBLIC, ALIGN=1, no class, no overlay, and USE16.
; An example of a NASM source file which can be assembled to a .OBJ file and linked on its own to a .EXE is given here.
; It demonstrates the basic principles of defining a stack, initialising the segment registers, and declaring a start point.
; This file is also provided in the test subdirectory of the NASM archives, under the name objexe.asm.
; This initial piece of code sets up DS to point to the data segment, and initialises SS and SP to point to the top of the
; provided stack. Notice that interrupts are implicitly disabled for one instruction after a move into SS, precisely for this
; situation, so that there’s no chance of an interrupt occurring between the loads of SS and SP and not having a stack to execute on.

;from http://www.supernovah.com/Tutorials/BootSector2.php : The processor uses the SS:SP segment offset address to determine the
;location of the stack. We must also clear the interrupt flag because we set the stack segment register. Setting the stack segment
;may cause an interrupt to be fired. Calling cli will prevent this from happening. After we setup the stack we, will re-enable
;interrupts. Ignore the fact that we disable interrupts right after re-enabling them. This won’t be the case much longer.
;..start:
;        mov     ax,DATASEGMENT1
;        mov     ds,ax
;        mov     ax,STACKSEGMENT
;        mov     ss,ax
;        mov     sp,stacktop

;NASM’s directives come in two types: user-level directives and primitive directives. Typically, each directive has a user-level
;form and a primitive form. In almost all cases, we recommend that users use the user-level forms of the directives, which are
;implemented as macros which call the primitive forms.
;Primitive directives are enclosed in square brackets; user-level directives are not.
;The BITS directive specifies whether NASM should generate code designed to run on a processor operating in 16-bit mode, 32-bit mode or 64-bit mode. The syntax is BITS XX, where XX is 16, 32 or 64.

;In most cases, you should not need to use BITS explicitly. The aout, coff, elf, macho, win32 and win64 object formats, which are designed for use in 32-bit or 64-bit operating systems, all cause NASM to select 32-bit or 64-bit mode, respectively, by default. The obj object format allows you to specify each segment you define as either USE16 or USE32, and NASM will set its operating mode accordingly, so the use of the BITS directive is once again unnecessary.
;The most likely reason for using the BITS directive is to write 32-bit or 64-bit code in a flat binary file; this is because the bin output format defaults to 16-bit mode in anticipation of it being used most frequently to write DOS .COM programs, DOS .SYS device drivers and boot loader software.
;You do not need to specify BITS 32 merely in order to use 32-bit instructions in a 16-bit DOS program; if you do, the assembler will generate incorrect code because it will be writing code targeted at a 32-bit platform, to be run on a 16-bit one.
;When NASM is in BITS 16 mode, instructions which use 32-bit data are prefixed with an 0x66 byte, and those referring to 32-bit addresses have an 0x67 prefix. In BITS 32 mode, the reverse is true: 32-bit instructions require no prefixes, whereas instructions using 16-bit data need an 0x66 and those working on 16-bit addresses need an 0x67.
;When NASM is in BITS 64 mode, most instructions operate the same as they do for BITS 32 mode. However, there are 8 more general and SSE registers, and 16-bit addressing is no longer supported.
;The default address size is 64 bits; 32-bit addressing can be selected with the 0x67 prefix. The default operand size is still 32 bits, however, and the 0x66 prefix selects 16-bit operand size. The REX prefix is used both to select 64-bit operand size, and to access the new registers. NASM automatically inserts REX prefixes when necessary.
;When the REX prefix is used, the processor does not know how to address the AH, BH, CH or DH (high 8-bit legacy) registers. Instead, it is possible to access the the low 8-bits of the SP, BP SI and DI registers as SPL, BPL, SIL and DIL, respectively; but only when the REX prefix is used.

;There are two approaches to storing data in memory called big endian and little endian. Big endian order means that the most
; significant byte (or word) is stored first in memory. That is, at a lower memory address. Intel IA-32 processors store data in little endian order.

; from http://forum.osdev.org/viewtopic.php?f=1&t=20933:
; Also, those “0x55 0xAA” magic bytes really are meant to be at offset 511 and 512 in the first sector (rather than the last 2 bytes of the sector).
; This might seem like it’s exactly the same thing, until you consider (for e.g.) floppy disks that are formatted with 1024-byte sectors or larger
; sectors (which is something that the BIOS is meant to support, but also something that I’d assume most BIOSs have bugs/problems with).
;